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PSoC™ 6 Forum Discussions

user_1669321
Level 5
Level 5
10 likes received First like received First like given

Hi,

I need my Clk_Peri to be at 19.2 MHz, thus I've selected 96 MHz for Clk_HF0 and a divider of 5 for Clk_Peri. However, I now can't get my BLE Write Requests.

For example, using CySmart, I write a string to a service of my device. I get the CY_BLE_EVT_GATTS_WRITE_REQ event, in which I copy the string to a circular buffer. I can see that the buffer has the string. However, when I exit Cy_BLE_ProcessEvents(), the buffer is now empty (the data is still in the buffer, but the circular buffer's variables are reset to zero). Here's the typedef of a circular buffer:

typedef struct {

   uint8_t *buffer;  /* Pointer to the static array */

   size_t readIdx;   /* Index of the next byte to read */

   size_t writeIdx;  /* Index of the next byte to write */

   size_t capacity;  /* Capacity of the buffer */

   size_t count;     /* Number of bytes currently in the buffer */

} CircularBuffer_t

So when I get the Write Request, writeIdx = 10 and count = 10. When I exit Cy_BLE_ProcessEvents(), both are now back to zero. I did not get this behavior when Clk_Slow was at 50 MHz (100 MHz / 2). As the code is all on the CM0+, I suspect that the problem comes from the fact that Clk_Slow, which controls the CM0+, is now at 19.2 MHz. Is there a way to change the Clk_Slow path to not be derived from Clk_Peri in the "Configure System Clocks" window?

Thanks,

Fred

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1 Solution
AchimE_41
Employee
Employee
5 sign-ins First comment on KBA 100 replies posted

May I ask why you need the 19.2MHz for the peripheral clock?

Isn't it possible to use one of the Peripheral clock dividers (8, 16 or 24.5bit)?

regards,

Achim

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3 Replies
user_1669321
Level 5
Level 5
10 likes received First like received First like given

It seems that I don't get this behavior when Clk_Peri = 24MHz.

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AchimE_41
Employee
Employee
5 sign-ins First comment on KBA 100 replies posted

May I ask why you need the 19.2MHz for the peripheral clock?

Isn't it possible to use one of the Peripheral clock dividers (8, 16 or 24.5bit)?

regards,

Achim

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Thanks Achim, I'll mess around with those, didn't think of it.

The problem with the circular buffer being reset was that I was debugging, thus getting disconnected, and I reset the buffer on a disconnection. That was a really dumb mistake.

I need 19.2 MHz to speak via UART to another device which runs at 19.2 MHz and I want the baud rate to have minimal error.

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