Desiging with CY8C6137BZI-F14

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shibin
Level 1
Level 1
5 replies posted 5 sign-ins First like received

Hi Team,
       We are designing a board using the MCU CY8C6137BZI-F14
      1 x UART = SCB7, TX - P1[1], RX - P1[0]
      2 x I2C = SCB5, SCL - P5[0], SDA - P5[1]
                          SCB8, SCL - P6[0], SDA - P6[1]
      16 x GPIO
       3 x Analog Read = P10[1], P10[4], P10[5] 
       1 x Analog Write = P10[0]
       SWD is the debugging interface. -
       SWDIO - P6[6]
      SWCLK - P6[7]
      XRES
      SWO - P6[4]
      32KHz RTC OScillator - P0[0], P0[1]
      High-speed oscillator - P12[6], P12[7]
1). I hope the pin mapping is correct
2). I believe the ECO and the WCO pins are correct and their load capacitors.
        The crystal for WCO used is - CM9V-T1A-32.768KHZ-12.5PF-20PPM-TA-QC its load capacitance is 12.5pF.
        The crystal used for  ECO is - LFXTAL063075BULK, load capacitance - 22pF
3). The VBACKUP pin is supplied from the same source that powers the VDDD pin.
4). We are not using a USB, so the pin VDDUSB has connected to the same power supply that powers the VDDD pin.
5). Only a 1uF decoupling capacitor is used at the VREF pin
6). Only a 10uF decoupling capacitor is placed at the VRF pin.
7). Could you please suggest to e a programmer and the development kit for the select MCU.
     I hope this will suffice. 
 DEV KIT - PSoC® 6 WiFi-BT Pioneer Kit (CY8CKIT-062-WiFi-BT) (cypress.com)
                                                     Programmer -  CY8CKIT-005 MiniProg4 Program and Debug Kit (cypress.com)

The schematic is attached herewith.
Please let me know if there are any mistakes.

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1 Solution
Raj_C
Moderator
Moderator
Moderator
250 solutions authored 500 replies posted 50 likes received

Hi @shibin,

I have reviewed your attached schematic and the following are my observations.

  1. For pin mapping, only P13.4 is not clearly visible and it seems like it is connected to the C3. It should be connected to the C2. Please verify this on your side.
  2. All SCB blocks are connected correctly. Just ensure 330 Ohms series and 4.7 KOhm pull-up resistance for I2C.
  3. Considering VDDIOx are connected to VDDD with given decoupling capacitors, please ensure to add one 0.1 uF capacitor and place all of the required capacitors close to the pins.
  4. VBACKUP doesn’t require a 10 uF capacitor (C63).
  5. VDDA doesn’t require a 1uF capacitor (C67).
  6. VBUCK requires a 4.7 uF capacitor only and short it to VCCD. No other capacitors are required.
  7. Yes, the ECO and the WCO pins are correct and their load capacitors are also correct.
  8. DEV KIT - PSoC® 6 WiFi-BT Pioneer Kit (CY8CKIT-062-WiFi-BT) and Programmer -  CY8CKIT-005 MiniProg4 Program and Debug Kit suffice the requirements.
  9. Please ensure all pins of the Debugger are connected correctly.

Let me know if further clarification is required.

Thank you

Best Regards

Raj Chaudhari

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2 Replies
Raj_C
Moderator
Moderator
Moderator
250 solutions authored 500 replies posted 50 likes received

Hi @shibin,

I have reviewed your attached schematic and the following are my observations.

  1. For pin mapping, only P13.4 is not clearly visible and it seems like it is connected to the C3. It should be connected to the C2. Please verify this on your side.
  2. All SCB blocks are connected correctly. Just ensure 330 Ohms series and 4.7 KOhm pull-up resistance for I2C.
  3. Considering VDDIOx are connected to VDDD with given decoupling capacitors, please ensure to add one 0.1 uF capacitor and place all of the required capacitors close to the pins.
  4. VBACKUP doesn’t require a 10 uF capacitor (C63).
  5. VDDA doesn’t require a 1uF capacitor (C67).
  6. VBUCK requires a 4.7 uF capacitor only and short it to VCCD. No other capacitors are required.
  7. Yes, the ECO and the WCO pins are correct and their load capacitors are also correct.
  8. DEV KIT - PSoC® 6 WiFi-BT Pioneer Kit (CY8CKIT-062-WiFi-BT) and Programmer -  CY8CKIT-005 MiniProg4 Program and Debug Kit suffice the requirements.
  9. Please ensure all pins of the Debugger are connected correctly.

Let me know if further clarification is required.

Thank you

Best Regards

Raj Chaudhari

shibin
Level 1
Level 1
5 replies posted 5 sign-ins First like received

Hi Raj,
Thank you for your reply.
Pin P13.4 is connected to C2.
All the rest of the corrections are made.
Thank you for your help and support.