Debug gives Error: psoc6.cpu.cm4 -- clearing lockup after double fault for PSoC62

[chwaitang]

Hi All,

I have try to build custom dual CPU application with PsOC62S2 Wi-Fi BT Pioneer Kit.

Both CM0 and CM4 app build ok with no errors.

I encounter following problem when I try to debug one core at a time (Either CM0 or CM4) with ModusToolbox_2.4.0.5972.

I can enter debug window with CM0 core and single step but I always get below error in console window when I start run from main();

===== Cortex-M DWT registers

Error: psoc6.cpu.cm4 -- clearing lockup after double fault

psoc6.cpu.cm4 halted due to debug-request, current mode: Handler HardFault

xPSR: 0x61000003 pc: 0x8008f3ee msp: 0x0000de8c

Polling target psoc6.cpu.cm4 failed, trying to reexamine

Info : psoc6.cpu.cm4: hardware has 6 breakpoints, 4 watchpoints

I cannot debug mode the CM4 app and have below errors. All I get is blank debug window.

===== Cortex-M DWT registers

Error: psoc6.cpu.cm4 -- clearing lockup after double fault

Polling target psoc6.cpu.cm4 failed, trying to reexamine

Info : psoc6.cpu.cm4: hardware has 6 breakpoints, 4 watchpoints

Info : SWD DPIDR 0x6ba02477

Error: Failed to read memory at 0x8008f3f0

Info : SWD DPIDR 0x6ba02477

Error: Failed to read memory at 0xaefbf7fa

I have following questions:

1) Is common  COMPONENT_BSP_DESIGN_MODUS device configuration for both CM0 and CM4 device enough? OR do we have to separately create different device config under CYW43012C0WKWBG tab (CM0)?

2) I have attached linker files for both  CM0 and CM4 for your review if this is cause of the above problem.

3) Does ModusToolbox_2.4.0.5972 support dual core debug? Say I want to debug CM4 core using retarget.io printf to terminal window in ModusToolBox and separate Serial terminal in windows using UART printf from CM0 via FTDI USB to UART adaptor wired to one of SCB block configured for UART in CM0. Is this ok? 

How will each core behave? Say I debug CM0 core. Is the CM4 core running at full speed? and vice versa for CM4 debug?

I am using CM0 for reading sensor data, and CM4 for managing Wi-Fi and/or BLE. Can the sensor data collected in CM0 be shared with CM4 for posting via MQTT?

I am relatively new to Post6 dual CPU and there are not much technical details on the above. Please advise

Thank you.

CW

[AlenAn14]

Hi @chwaitang ,

1) Is common  COMPONENT_BSP_DESIGN_MODUS device configuration for both CM0 and CM4 device enough? OR do we have to separately create different device config under CYW43012C0WKWBG tab (CM0)?

A] If you are planning on running the CYW43012C0WKWBG on the CM4 core, then you need to make the changes in device configurator only in the CM4 project. And using the device configurator for the CM0 project, you can configure the GPIO's etc necessary for your sensor data acquisition only and no changes for the CYW43012C0WKWBG needs to be made there.

2) I have attached linker files for both  CM0 and CM4 for your review if this is cause of the above problem.

A] Are you debugging on a code example provided by Infineon or your own custom application. If its a code examples, can you let me know the name of the same. If its a custom application , please share the firmware so we can debug the same on our end.

3) Does ModusToolbox_2.4.0.5972 support dual-core debug? Say I want to debug CM4 core using retarget.io printf to terminal window in ModusToolBox and separate Serial terminal in windows using UART printf from CM0 via FTDI USB to UART adaptor wired to one of SCB block configured for UART in CM0. Is this ok? 

A] No , ModusToolbox does not support dual core debug.

How will each core behave? Say I debug CM0 core. Is the CM4 core running at full speed? and vice versa for CM4 debug?

A] Yes, when you are debugging CM0 core, until the line Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR);, the CM4core is in disabled state, but after the debugger crosses this API, the CM4 Starts normal operation even when you are debugging the CM0 core.

I am using CM0 for reading sensor data, and CM4 for managing Wi-Fi and/or BLE. Can the sensor data collected in CM0 be shared with CM4 for posting via MQTT?

A] You will have to use IPC for this to share the data between the core, i.e. basically when CM0+ has data, it notifies the CM4 core via IPC it has data and passes a pointer to that data to CM4 so that it can transmit the same via Wifi/BLE.
Please refer to the code examples on IPC for this:

Warm Regards
Alen

[AlenAn14 · Accepted solution]

Hi @chwaitang ,

I checked the linker scripts you provided and I observed one error here, 

In the cy8c6xxa_cm0plus.ld, you have set the flash size for the CM0+ core as 0x80000 in line 67:

 flash             (rx)    : ORIGIN = 0x10000000, LENGTH = 0x80000

While in line 51 of the cy8c6xxa_cm4_dual.ld file, you have set the flash size as 0x8000 for CM0+:

/* The size of the Cortex-M0+ application image at the start of FLASH */
FLASH_CM0P_SIZE  = 0x8000;

 
Please correct the flash size in the cy8c6xxa_cm0plus.ld file to 0x8000 instead of 0x80000.
This mismatch in flash size assigned can be the cause of your error.

Hope this helps.

Warm Regards
Alen

[chwaitang]

Thanks Alen,

Warm regards

CW