DMA to verilog component

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Astronix
Level 1
Level 1
5 replies posted 10 sign-ins 5 questions asked

I want to use DMA to transfer chunks of data (32 bytes at a time) into a component that I'm implementing with verilog. 

I plan to use the control register to transfer the DMA data into the component. One thing I don't understand is, within the veriolg code, does the component know when new data has arrived in the control register? Is there some sort of enable signal or handshake to indicate when a transfer is complete? I can't find this anywhere in the documentation. 

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1 Solution
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

in PSoC5 DMA component has nrq output, which pulses when transfer has completed. Probably something like that is present in PSoC6 as well

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4 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

in PSoC5 DMA component has nrq output, which pulses when transfer has completed. Probably something like that is present in PSoC6 as well

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Would that show up on the DMA component? I only see trigger input and trigger output, is that what you mean?

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My guess, a trigger output is what you need

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Hari
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hi @Astronix 

Yes, that is right. The trigger output will have a pulse whenever the data transfer is complete. This can be used as an indication to ensure data is present in the verilog component. 

 

Best regards, 

Hari

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