DEBUG UART with FreeRTOS

[ravo]

Dears,

I would like to use debug uart. I have problems with Retarget IO library to initialize the UART block.

Partial code:

int main(void)
{
cy_rslt_t result;

/* Initialize the device and board peripherals */
result = cybsp_init() ;
if (result != CY_RSLT_SUCCESS)
{
CY_ASSERT(0);
}

/* Enable global interrupts */
__enable_irq();

/* Initialize retarget-io to use the debug UART port */
result = cy_retarget_io_init(CYBSP_DEBUG_UART_TX, CYBSP_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE);

printf( "Demo started...\r\n" );

/* Create the RTOS tasks */
xTaskCreate(audio_app_process, "Audio App Task",
RTOS_STACK_DEPTH, NULL, RTOS_TASK_PRIORITY,
&rtos_audio_app_task);

...

/* Create RTOS Event Group */
rtos_events = xEventGroupCreate();

/* Start the RTOS Scheduler */
vTaskStartScheduler();

/* Should never get there */

return 0;
}

Can I use different pins TX and RX instead of default 5.1 and 5.0 (these pins are on CY8CKIT-062 shared with I2S audio) I tried to move it to 9.1 and 9.0 and after first calling printf("") it will hang.

Have anyone idea what could be wrong ?

Regards

Radim

[AlenAn14]

Hi @ravo ,

From the schematic of the KitProg section of the 062-BLE-kit, you can see the following:

If you want to use pins 9.0 and 9.1 for UART, then you can do so provided that you connect 9.0 and 9.1 via jumpers to the 12.6 and 12.7 pins of J6 (shown in above image) to use the UART via KitProg.

Make sure you disconnect the P5.0 and P5.1 lines from the UART when doing so (by removing the resistors R120 and R119) as mentioned in the kit guide since these lines are hardwired on the board to 12.6 and 12.7 of KitProg for UART communication. This way there would be no interference with the I2S lines you wish to use on P5.0 and P5.1.

Also add an assert after initializing the retarget IO routine just to verify if the initialization is a success or not

result = cy_retarget_io_init(CYBSP_DEBUG_UART_TX, CYBSP_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE);
if (result != CY_RSLT_SUCCESS)
{
   CY_ASSERT(0);
}

Hope this helps!

Warm Regards
Alen

[ravo]

Dear Alen,

thanks for response. And sorry that I have been omitted to write more details.

For first I have tested it on CY8CPROTO-062 kit and there it is working (of course with wire connection from P9.0 and P9.1 to PSOC5L5 UART_RX and UART_TX signals. And also resistors on lines to P5.0 and P5.1 removed (to use i2s audio)

But on bigger eval kit CY8CKIT-062 WIFI-BT I need to use different pins for RX, TX (hard to find unused), because P9.0 and P9.1 here is shared with TFT display on shield. I will try to use different pins.

Radim

Radim

[AlenAn14 · Accepted solution]

Hi @ravo ,

If you are using the TFT shield, then it will be a little difficult for usage of UART pins from the headers as the only options are the pins on Header J19 which do not support UART.

You still have 2 options to get the UART lines:

#Option 1
Pins P1_0 (Rx) and P4_1(Tx) (SCB7) can be used for UART. But they are located at different locations i.e. P1_0 on header J19 and P4_1 on header J21.
Also you have to make the additional hardware changes to disconnect CapSense pins from P1_0

#Option 2
You can also use the pins P12_0 and P12_1 for UART (SCB 6).
You can get these pins on the J5 Header on the board:

But , these pins are connected to the KitProg SPI lines. So you will have to make the hardware changes as mentioned 

Hope this helps

Warm Regards
Alen

[ravo]

Dear Alen,

many thanks for this suggestions. I find that for my application will be the best solution to connect UART through P12.0 and P12.1 pins, because I am using also capsense (both buttons + slider). But I don't need SPI to kitprog3.

I will remove R77 and R85 to not sharing with level translator circuit and SPI lines.

And for last. Instead of worse accessible pins on J5 (under TFT shield) I will use J14 (is on the bottom edge of eval board)

I will test this workaround. I hope that it will be working.

Best Regards,

Radim

[AlenAn14]

Hi @ravo ,

Sure this can work.
Do let me know how this turns out.

Warm Regards
Alen

[ravo]

Dear Alen,

thanks, I tested on both kits CY8CPROTO-062 and CY8CKIT-062 WIFI BT and it is working fine with TX as 12.1 and Rx as 12.0 (SCB6)

Radim

[AlenAn14]

Hi @ravo ,

Glad the suggestion worked😊 !
Please feel free to post any queries or issues you may have on Infineon products in the future as well on the community and we will be happy to help>

Warm Regards
Alen