I am using CY8CPROTO-063-BLE board and had some issue with clock settings. I converted my project to Keil and it ran into the forever loop in CyClockStartupError() and never entered into main().
It seems that the problem occurs when Cy_SysClk_PllManualConfigure() was called in ClockInit(). It returns error code 0x004A0003 and jumps to CyClockStartupError().
The code works fine without any debugger or using PSoC Creator's GDB debugger, but it fails using Keil MDK debugging. Is there any setting needed to be done in order to debug using Keil?
This is my clock settings for FLL/PLL.
I encountered this post in the community: Change PLL clock frequency with C
I would like to try this approach, but however I cannot even get to main(). The only option might be trying not to enable PLL from the TopDesign but after getting into main(). Is there anyway to solve this issue?
Also, is there any way to set clock frequency to 150MHz and not have debugging issues when using Keil?
Please find the attached an empty project that would fail in debugging using Keil.
I am also using the 063-BLE and had a similar error situation with CyClockStartupError() hangup with a code of 5. It turned out that the problem was actually hardware and difficult to isolate. On one of our adapter boards the supercap which provides the VBACKUP voltage was faulty. It only provided 0.9 volts at VBACKUP rather than the designed 3.0. After replacing the supercap, the problem went away.