Change PLL clock frequency with C

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jac_3880146
Level 1
Level 1

I am trying to change the PLL clock using the cypress API functions, instead of the "Clocks" UI section. There is a "walkthrough" here: https://www.cypress.com/file/420571/download on page 132.

My code looks something like this:

int main(void)

{

     uint32_t clkPath = 1;

    Cy_SysClk_ClkPathSetSource(clkPath, CY_SYSCLK_CLKPATH_IN_IMO);

    cy_stc_pll_manual_config_t* config;

    configNew->feedbackDiv = 25UL;

    configNew->referenceDiv = 1UL;

    configNew->outputDiv = 2UL;

    configNew->lfMode = true;

        Cy_SysClk_PllEnable(clkPathManual, 2); //  > 1us delay as suggested on step 3 of TRM   

     Cy_SysClk_PllManualConfigure(clkPath, config);

...

}

It seems that the PLL is already enabled when Cy_SysClk_PllManualConfigure() is called, and i get CY_SYSCLK_INVALID_STATE return code from the function. Any suggestions? Thanks in advance.

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1 Solution

Your C code still not quite right. You are declaring a pointer but not allocating memory. Try this:

    Cy_SysClk_ClkPathSetSource(clkPathManual, CY_SYSCLK_CLKPATH_IN_IMO);

    cy_stc_pll_manual_config_t configNew;

    configNew.feedbackDiv = 25UL;

    configNew.referenceDiv = 1UL;

    configNew.outputDiv = 2UL;

    configNew.lfMode = true;

    Cy_SysClk_PllDisable(clkPathManual);

    Cy_SysClk_PllManualConfigure(clkPathManual, &configNew);

    Cy_SysClk_PllEnable(clkPathManual, 2); // 2us delay

View solution in original post

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8 Replies
RodolfoGL
Employee
Employee
250 solutions authored 250 sign-ins 5 comments on KBA

You should enable the PLL after calling ManualConfigure().

I also don't see you assigning the pointer config to configNew.

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Yea, my bad - i messed up the copy pasting . I tried enabling the PLL after configure() but I still get the INVALID_STATE code back. The PLL seems to be already enabled...

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So disable the PLL before calling Manual Configure. There is an API for that.

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Thanks for the tip, but actually I had tried that before and it doesn't seem to work. So with your proposed changes:

    Cy_SysClk_ClkPathSetSource(clkPathManual, CY_SYSCLK_CLKPATH_IN_IMO);

    cy_stc_pll_manual_config_t* configNew;

    configNew->feedbackDiv = 25UL;

    configNew->referenceDiv = 1UL;

    configNew->outputDiv = 2UL;

    configNew->lfMode = true;

    Cy_SysClk_PllDisable(clkPathManual);

    Cy_SysClk_PllManualConfigure(clkPathManual, configNew);

    Cy_SysClk_PllEnable(clkPathManual, 2); // 2us delay

When I debug the app I get the following error message:

The start request failed. Encountered error (Error 'SWD error FAULT' received while attempting to read memory 0x402102C0-0x402102C4)

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Your C code still not quite right. You are declaring a pointer but not allocating memory. Try this:

    Cy_SysClk_ClkPathSetSource(clkPathManual, CY_SYSCLK_CLKPATH_IN_IMO);

    cy_stc_pll_manual_config_t configNew;

    configNew.feedbackDiv = 25UL;

    configNew.referenceDiv = 1UL;

    configNew.outputDiv = 2UL;

    configNew.lfMode = true;

    Cy_SysClk_PllDisable(clkPathManual);

    Cy_SysClk_PllManualConfigure(clkPathManual, &configNew);

    Cy_SysClk_PllEnable(clkPathManual, 2); // 2us delay

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Thanks Rodolfo, but I still get the same error...

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Your problem now is debugging with SWD, not the application. Try to use a UART to debug this issue to make sure you are not getting the original problem from your post - INVALID_STATE return from the PllManualConfigure().

Are you driving the CPUs with PLL? Do it with FLL from now.

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Yes I am actually using PLL because it supports the max CPU freq (150MHz), which is what I want, while FLL seems to support up to 100. I will debug with uart and investigate further

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