Cannot reprogram after setting M0+ Core to 12,5 MHz

[matthiasb]

Hello,
i was experimenting with the PSOC63 CPU and at one time I tried to set the M0+ Core to 12,5MHz (FLL 50 -> 25 Mhz / 2 divider). The M4 Core is at 50 MHz.

It didn't really work and i wanted to reprogram it again with a 25MHz Clock for the M0+ (which worked before). But I cannot reprogram the MCU with kitprog3.

Board is a CYC8PROTO-063-BLE. Coding on Linux.

This is the output of the failing flashing process:

Open On-Chip Debugger 0.11.0+dev-4.3.0.1746 (2021-09-16-15:53)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
cortex_m reset_config sysresetreq
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : Using CMSIS-DAPv2 interface with VID:PID=0x04b4:0xf155, serial=172201A500249400
Info : CMSIS-DAP: SWD  supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.30.1155
Info : KitProg3: Pipelined transfers enabled
Info : VTarget = 3.320 V
Info : kitprog3: acquiring the device (mode: reset)...
Error: kitprog3: failed to acquire the device
Info : clock speed 2000 kHz
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: DAP 'psoc6.cpu' initialization failed (check connection, power, transport, DAP is enabled etc.)
** OpenOCD init failed **
shutdown command invoked
** Program operation failed **
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Error executing event reset-deassert-post on target psoc6.cpu.cm0:
/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg:115: Error: 
in procedure 'ocd_process_reset' 
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 788
in procedure 'mxs40_reset_deassert_post' called at file "/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/psoc6_common.cfg", line 134
at file "/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg", line 115
Error: Error connecting DP: cannot read IDR
Error executing event reset-deassert-post on target psoc6.cpu.cm4:
/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg:115: Error: 
in procedure 'ocd_process_reset' 
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 788
in procedure 'mxs40_reset_deassert_post' called at file "/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/psoc6_common.cfg", line 169
at file "/home/matthias/ModusToolbox/tools_2.4/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg", line 115
Info : psoc6.dap: powering down debug domain...
Error: Error connecting DP: cannot read IDR
Error: Error connecting DP: cannot read IDR
Warn : Failed to power down Debug Domains
Error: Error connecting DP: cannot read IDR

[Rakshith]

Hi @matthiasb, 

From the logs that you have shared, I understand that you are using ModusToolbox 2.4. Can you please let me know if there is any firmware that is already loaded on the device? If so, is the code running? Can you also try connecting the device to Cypress Programmer and PSoC Programmer in that order and trying to erase flash? Please share the logs so that we can get a better understanding of the issue.

[matthiasb · Accepted solution]

Hi!
The program wasn't running anymore and i couldn't upload a new firmware.

However i could fix it by running "fw-loader --update-kp3". seems like the bootloader wasn't working anymore when i switched to 12,5MHz and rewriting the bootloader was still possible trough swd.

thank you!

[Rakshith]

Hi @matthiasb, 

KitProg3 should not be affected by changing the clock frequency of the target. The KitProg3 firmware could be corrupted due to another reason. You should be able to change the CPU clock after updating KP3 firmware.

[matthiasb]

Yes, i agree.

I tested it again and i could reprogram the device after setting the M0 core to 12,5MHz and even 6,25 MHz. so that wasn't problem.

I don't know what caused corrupting the bootloader. Strange.