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PSoC™ 6 Forum Discussions

Michael_Kupfner
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Hi,

I'm studying the schematic of CY8CPROTO-062-4343W PSoC 6 Wi-Fi BT Prototyping Kit. Level shifters (U10, U12) have been used between PSoC5LP (KitProg) and PSoC 6 because of different voltage domains (P5LP_VDD and VTARG). Affected signals:

P5LP1_6 <-> UART_RTS  (U10)
P5LP15_5 <-> UART_CTS (U12)

I'm now asking myself why Cypress/Infineon has chosen U12 instead of routing VTARG directly to VDDIO2 of PSoC5LP.

Similar considerations also apply for CY8CKIT-062-BLE (PSoC 6 BLE Pioneer Board), where level translater U13 has been used for SPI and UART. Here, SPI_MISO signal (KitProg SIO pin P12[5]) has been routed via U13, although SIO pin has Vref-feature and P5LP_SIO_VREF = VTARG_MON = P6_VDD ( != 5V).

I'm happy about every idea.

Michael

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Len_CONSULTRON
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Michael,

It appears Cypress made a design choice based on the different voltage domains used by the PSoC5LP used on the KitProg circuits and the PSoC6 used for the target.

The PSoC5LP operating voltage range is 1.8V to 5.5V.

The PSoC6 operating voltage range is 1.8V to 3.6V.

Since ~5V is supplied using the KitProg USB interface, an LDO is needed to power the PSoC6 to no more than 3.6V.

In theory both micros could have been powered off the same LDO down to 1.8V.  This should eliminate the need for the level shifters.   They chose not to do that.  The PSoC5LP is run at 5V.

You are correct that the PSo5LP SIOs have the ability to use a Vref as a reference voltage for level-shifted inputs and outputs.  This also would have avoided external level shifters.  They could have used a PSoC5LP analog pin to input the LDO output voltage and use that voltage as the Vref for the SIO.

Maybe Cypress chose the level-shifters because the KitProg board can be broken off. (?)

 

 

Len
"Engineering is an Art. The Art of Compromise."

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Len_CONSULTRON
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Michael,

It appears Cypress made a design choice based on the different voltage domains used by the PSoC5LP used on the KitProg circuits and the PSoC6 used for the target.

The PSoC5LP operating voltage range is 1.8V to 5.5V.

The PSoC6 operating voltage range is 1.8V to 3.6V.

Since ~5V is supplied using the KitProg USB interface, an LDO is needed to power the PSoC6 to no more than 3.6V.

In theory both micros could have been powered off the same LDO down to 1.8V.  This should eliminate the need for the level shifters.   They chose not to do that.  The PSoC5LP is run at 5V.

You are correct that the PSo5LP SIOs have the ability to use a Vref as a reference voltage for level-shifted inputs and outputs.  This also would have avoided external level shifters.  They could have used a PSoC5LP analog pin to input the LDO output voltage and use that voltage as the Vref for the SIO.

Maybe Cypress chose the level-shifters because the KitProg board can be broken off. (?)

 

 

Len
"Engineering is an Art. The Art of Compromise."
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Michael_Kupfner
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Dear Len,

thanks for sharing your thoughts. The discussion here is not about the LDO... it's about the level-shifters. 

The PSoC5LP familiy datasheet says

"Each VDDIO pin powers a specific set of I/O pins. (The USBIOs are powered from VDDD.) Using the VDDIO pins, a single PSoC can support multiple voltage levels, reducing the need for off-chip level shifters."

 

The PSoC5LP acting as the KitProg-unit could still be powered by 5V, if the PSoC 6 is running at 3.3V in parallel. By connecting the PSoC6 voltage with the VDDIO-pins of PSoC5LP, level shifters could be avoided. So far, that's my understanding.

So... why did Cypress/Infineon engineers taken level shifters in their designs?

I can only think of two different reasons...

a) The KitProg Schematic has been taken as an "untouchable" building-block. This would ensure that all KitProg3's which can be found on various development boards are of the same hardware. Could be simpler on FW side; but on the other hand the full beauty of the PSoC5LP can't be shown. This could explain why a signal of a SIO pin has been routed over a level shifter.

 

b) There is a problem when voltage at VDDIOx pin is changing during operation or is even switched off, if the rest of the PSoC5LP is running/powered. Because KitProg allows changing the (target) power (e.g. 1.8V, 2.5V, 3.3V) or even allows switching power (target voltage) on/off. VDDIO has to be specified in a PSoC creator project...

 

But I'm not sure... 

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