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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

Hi Team, 

I'm working on a use case where I have to run MQTT, HTTPs applications on the CM0p core of my PSoC 6 (2M part). I see that the code examples on github.com/Infineon by default run on the CM4 core after the CM0p goes to sleep. I am aware of a Makefile variable called CORE=CM0p but is that enough to successfully build and run a code example (obviously, after the linker script updates to provide sufficient memory for the code coming on the CM0p)? Further, I am also concerned about the code space - if it is possible to fit this into <1M flash (or <512K of flash excluding the 43xxx firmware). like https://github.com/Infineon/mtb-example-wifi-https-server or https://github.com/Infineon/mtb-example-wifi-mqtt-client?

Request you to link me to the sufficient resources to help my use case.

 

Regards,

Varun Kaushik

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1 Solution
VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

Hi @Gautami_12,

Is the dual core debugging supported only with the dual-core application structure?  

While I do understand the limitations of HAL, I think if the hardware resource sharing is taken care of, it should not pose a problem like the one I described in this thread.

Upon further investigating with a few people, I found out that this anomalous behavior was due to the macro configUSE_TICKLESS_IDLE. After I undefined (set to 0) the same in the configs\COMPONENT_CM0P\FreeRTOSConfig.h file, my application behaved normally. 

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8 Replies
Phanindra_I
Moderator
Moderator
Moderator
250 sign-ins 10 likes given 25 likes received

Hi Varun,

Can you let me know which exact PSoC 6 part or eval board you're using for your use case? Meanwhile, i will check the dependencies for your use case and try to implement it on my side.

Thanks 

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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

I am using the RP01 feather kit - CYSBSYSKIT-DEV-01 which contains PSoC 6 + 43012.

My endgame is to implement another custom BSP such that the CM0p sleep code is replaced with this custom firmware on the CM0p while CM4 is up for me to run some other code which might be totally unrelated.  

But I first want to try an existing code example (mentioned above) to run in CM0p core even if CM4 remains dead. 

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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

I created two independent projects 

  1. https://github.com/Infineon/mtb-example-wifi-mqtt-client for CM0p.
  2.  A modified https://github.com/Infineon/mtb-example-hal-hello-world for CM4. The modification is described below. 

I made the edits to my respective linker scripts such that 1M of flash and approximately 512K of RAM for each core.  I observe a strange behavior - when the CM4 app is running the CM0p doesn't run and vice versa. I tried to use debugger for one core while the other is running but that did not help as by debug session itself did not start.

This is the one line I added in the MQTT_Client CE code to start CM4. 

VarunK_66_1-1674200863698.png

 

This is my CM4 code:

VarunK_66_0-1674200791053.png

 

When I got both applications to run (it doesn't seem to reliably run both cores), this is my observation:

VarunK_66_2-1674201003857.png

 

While I expect the user LED to toggle and the UART print to appear every 1 sec, it seems to be appearing after 5-6 seconds and showing unpredictable behavior. 

 

 

GCC_ARM Linker script modifications (rest of the *.ld file remains intact): 

CM0p:

VarunK_66_3-1674201051209.png

CM4:

VarunK_66_6-1674201130086.png


VarunK_66_4-1674201089654.png

 

 

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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

With the said above behavior, if my CM0p code changes to a periodic print statement (like the one I had for CM4 in the above post), I am getting a proper working predictable behavior. 

VarunK_66_7-1674201268271.png

 

My questions: 

  • Is there any asset in FreeRTOS, WHD, WCM, etc. that is making my system behavior like this?
  • Is this a problem with retarget-io as I do not see its usage in dual core code examples like https://github.com/Infineon/mtb-example-psoc6-dual-cpu-ipc-sema.
  • Why did a debug session from Eclipse IDE for MTB did not start for me? Is debugging supported on one core while the other is running some application?

 

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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

Posting the log of fully functional MQTT Client on CM0p. There are missing prints from the CM4 application. 

VarunK_66_0-1674467046135.png

 

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Gautami_12
Moderator
Moderator
Moderator
50 likes received 100 solutions authored 250 replies posted

Hi @VarunK_66 ,

I can see that you are trying to implement a HAL-based code application on both core’s please try to implement PDL-based code for the CM0+ core for more information please refer to https://www.infineon.com/dgdl/Infineon-AN215656_PSoC_6_MCU_Dual-CPU_System_Design-ApplicationNotes-v... document. Also please follow the process suggested in the above document to use a CM0+ core like the process to create a dual-core application and the changes that must be made in the linker script etc.

Gautami_12_0-1675231916653.png

"Why did a debug session from Eclipse IDE for MTB did not start for me? Is debugging supported on one core while the other is running some application?"

The dual-core debugging in ModusToolbox version 2.4 is not a supported feature but was added in ModusToolbox version 3.0 along with a new application structure design for ease of doing dual-core designs as well as debugging them.

I've done rudimentary debugging of a dual core design in Modus Toolbox 3.0 Eclipse IDE with KitProg3 and it is working fine for me as expected.

I'm verifying that the underlying issue is MTB 2.4 vs 3.0. Our ultimate suggestion may require you to move to the MTB 3.0 and the application structure in that system to assure success.

Warm Regards,
Gautami J

 

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VarunK_66
Employee
Employee
First solution authored 5 replies posted 5 sign-ins

Hi @Gautami_12,

Is the dual core debugging supported only with the dual-core application structure?  

While I do understand the limitations of HAL, I think if the hardware resource sharing is taken care of, it should not pose a problem like the one I described in this thread.

Upon further investigating with a few people, I found out that this anomalous behavior was due to the macro configUSE_TICKLESS_IDLE. After I undefined (set to 0) the same in the configs\COMPONENT_CM0P\FreeRTOSConfig.h file, my application behaved normally. 

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Gautami_12
Moderator
Moderator
Moderator
50 likes received 100 solutions authored 250 replies posted

Hi @VarunK_66 ,

Glad that your query is resolved.

Warm Regards.
Gautami J

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