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MiHe_282546
Level 3
Level 3
5 sign-ins 10 questions asked 10 replies posted

Hi I'm working with the EVK: CY8CKIT-064S0S2-4343W

I'm using Modustoolbox 3.0 I've started a new application from example UART_Transmit_and_Receive for CY8CKIT-064B0S2-4343W and migrated it for CY8CKIT-064S0S2-4343W using this guide:

https://community.infineon.com/t5/PSoC-6/How-to-run-examples-of-peripheral-on-CY8CKIT-064S0S2-4343W/...
I've compiled the project successfully 

I've programmed the PSOC and this is the log:

Open On-Chip Debugger 0.11.0+dev-4.4.0.2134 (2022-09-08-13:07)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
kitprog3 set_latest_version: X:/Infineon/Tools/ModusToolbox/tools_3.0/fw-loader 2.40.1241
** Main Flash size limited to 0x1D0000 bytes
adapter speed: 2000 kHz
adapter srst delay: 0
adapter srst pulse_width: 5
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
** Using POWERUP_DELAY: 5000 ms
** Using TARGET_AP: cm4_ap
** Using ACQUIRE_TIMEOUT: 15000 ms
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
Info : Using CMSIS-flash algorithms 'CY8C6xxA_SMIF_S25FL512S' for bank 'psoc64_smif_cm4' (footprint 12780 bytes)
Info : CMSIS-flash: ELF path: ../flm/cypress/cat1a/CY8C6xxA_SMIF_S25FL512S.FLM
Info : CMSIS-flash: Address range: 0x18000000-0x1BFFFFFF
Info : CMSIS-flash: Program page size: 0x00001000 bytes
Info : CMSIS-flash: Erase sector size: 0x00040000 bytes, unified
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : Using CMSIS-DAPv2 interface with VID:PID=0x04b4:0xf155, serial=160C19A4002A9400
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.40.1241
Info : KitProg3: Pipelined transfers enabled
Info : KitProg3: Asynchronous USB transfers enabled
Info : VTarget = 3.319 V
Info : kitprog3: acquiring the device (mode: reset)...
Info : clock speed 2000 kHz
Info : SWD DPIDR 0x6ba02477
***************************************
** Use overriden Main Flash size, kb: 1856
** Silicon: 0xE4A0, Family: 0x102, Rev.: 0x12 (A1)
** Detected Device: CYS0644ABZI-S2D44
** Flash Boot version: 4.0.1.1089
** SFlash version: 0x4bbb0
***************************************
Info : gdb port disabled
Info : starting gdb server for psoc64.cpu.cm4 on 3333
Info : Listening on port 3333 for gdb connections
Info : Deferring arp_examine of psoc64.cpu.cm4
Info : Use arp_examine command to examine it manually!
Error: [psoc64.cpu.cm4] Target not examined, will not halt after reset!
Info : SWD DPIDR 0x6ba02477
Info : kitprog3: acquiring the device (mode: reset)...
Info : Waiting up to 15.0 sec for the bootloader to open AP #2...
Info : Waiting up to 15.0 sec for the handshake from the target...
Info : [psoc64.cpu.cm4] external reset detected
psoc64.cpu.cm4 halted due to debug-request, current mode: Thread
xPSR: 0x61000000 pc: 0x1600400c msp: 00000000
** Programming Started **
auto erase enabled
Info : Flash write discontinued at 0x1002cf53, next section at 0x10050000
Info : Padding image section 0 at 0x1002cf53 with 173 bytes (bank write end alignment)

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Info : Padding image section 1 at 0x100591f2 with 14 bytes (bank write end alignment)

[100%] [################################] [ Erasing ]

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wrote 221696 bytes from file X:/mtw/UART_Transmit_and_Receive/build/CY8CKIT-064S0S2-4343W/Debug/mtb-example-psoc6-uart-transmit-receive.hex in 3.124608s (69.289 KiB/s)
** Programming Finished **
** Program operation completed successfully **
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Info : Deferring arp_examine of psoc64.cpu.cm4
Info : Use arp_examine command to examine it manually!
Info : SWD DPIDR 0x6ba02477
Info : Waiting up to 15.0 sec for the bootloader to open AP #2...
Info : [psoc64.cpu.cm4] external reset detected
shutdown command invoked
Info : psoc64.dap: powering down debug domain...

1. I don't understand what this error means: Error: [psoc64.cpu.cm4] Target not examined, will not halt after reset!

2. After programming I'm observing the COM port of the KitProg and what I see is this:

[INF] /******************************************************/
[INF] PSoC6 CyBootloader Application 1.1.0.1796
[INF] /******************************************************/
[INF]
[INF] CypressBootloader Started
[INF] Secondary Slot 2 will upgrade from External Memory
[INF] Enabled multi-image N = 2:
[INF] External Memory initialized w/ SFDP.
[INF] Swap type: none
[INF] Swap type: none
[ERR] Image in the primary slot is not valid!
[INF] CypressBootloader found none of bootable images
[ERR] There is an error occurred during bootloader flow. MCU stopped.

Why the MCU doesn't boot from the primary slot?

Why the MCU secondary slot is not erased? What is this program?

Thanks

Michael H. 

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1 Solution
Gautami_12
Moderator
Moderator
Moderator
50 likes received 100 solutions authored 250 replies posted

Hi Michael,

Please download the key from AWS, and place it in the ‘USERAPP_CM4_KEY.json’ file of the ‘keys’ folder and then re-provision the device, so that the device uses the given public key for the verification of the device.
For more information please refer to PSoC64 Secure Boot SDK .

Warm Regards,
Gautami J

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5 Replies
Gautami_12
Moderator
Moderator
Moderator
50 likes received 100 solutions authored 250 replies posted

Hi @MiHe_282546 ,

Can you please attach the hex file generated from your device in this thread?
Also please refer to a similar thread and let us know if this helps to solve the issue.

Warm Regards,
Gautami J

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MiHe_282546
Level 3
Level 3
5 sign-ins 10 questions asked 10 replies posted

Hi Gautami,

I've attached the hex files which have been generated in the build folder

Best Regards

Michael H.

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wisc_ece353
Level 3
Level 3
10 replies posted First question asked 10 sign-ins

@MiHe_282546

This error shows up when the user image could not be validated by the PSoC 64 device. Can you confirm that you have used the right keys? Which keys/policy file did you use during the provisioning of the device?

Also, I believe there is a default code example that natively supports this kit. Maybe we could start from there and see if it works?

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I guess now that I need to use keys and I guess that because this kit support AWS, I need to use AWS keys...

Where I can find instructions how to add the keys to the project and how to use them for burning my application to the SOC. 

Thanks

Michael H.

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Gautami_12
Moderator
Moderator
Moderator
50 likes received 100 solutions authored 250 replies posted

Hi Michael,

Please download the key from AWS, and place it in the ‘USERAPP_CM4_KEY.json’ file of the ‘keys’ folder and then re-provision the device, so that the device uses the given public key for the verification of the device.
For more information please refer to PSoC64 Secure Boot SDK .

Warm Regards,
Gautami J

0 Likes