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JeHa_3912621
Level 3
Level 3
25 replies posted 10 replies posted 10 questions asked

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why  the buffer address start 0x08024A98?   

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1 Solution

There are two linker script files, cy8c6xx7_cm4_dual.ld and cy8c6xx7_cm0plus.ld

GS004438.png

You can change the configuration at the MEMORY section in both linker script files like as following.

MEMORY

{

    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.

     * You can change the memory allocation by editing the 'ram' and 'flash' regions.

     * Note that 2 KB of RAM (at the end of the RAM section) are reserved for system use.

     * Using this memory region for other purposes will lead to unexpected behavior.

     * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',

     * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.

     */

    ram               (rwx)   : ORIGIN = 0x08024000, LENGTH = 0x23800

    flash             (rx)    : ORIGIN = 0x10080000, LENGTH = 0x80000

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NoriTan
Employee
Employee
25 sign-ins 5 questions asked 10 sign-ins

I have built the code example UART_Low_Level_DMA and checked the MAP files.

There are two MAP files, one for CM4 and another one for M0+.

The map file for CM4 has following configuration.

Memory Configuration

Name             Origin             Length             Attributes

ram              0x08024000         0x00023800         xrw

flash            0x10080000         0x00080000         xr

em_eeprom        0x14000000         0x00008000         xr

sflash_user_data 0x16000800         0x00000800         xr

sflash_nar       0x16001a00         0x00000200         xr

sflash_public_key 0x16005a00         0x00000c00         xr

sflash_toc_2     0x16007c00         0x00000200         xr

sflash_rtoc_2    0x16007e00         0x00000200         xr

xip              0x18000000         0x08000000         xr

efuse            0x90700000         0x00100000         r

*default*        0x00000000         0xffffffff

The CM4 uses SRAM from 0x08024000 to 0x080477FF

The map file for CM0+ has following configuration.

Memory Configuration

Name             Origin             Length             Attributes

ram              0x08000000         0x00024000         xrw

flash            0x10000000         0x00080000         xr

em_eeprom        0x14000000         0x00008000         xr

sflash_user_data 0x16000800         0x00000800         xr

sflash_nar       0x16001a00         0x00000200         xr

sflash_public_key 0x16005a00         0x00000c00         xr

sflash_toc_2     0x16007c00         0x00000200         xr

sflash_rtoc_2    0x16007e00         0x00000200         xr

xip              0x18000000         0x08000000         xr

efuse            0x90700000         0x00100000         r

*default*        0x00000000         0xffffffff

The CM0+ uses SRAM from 0x08000000 to 0x08023FFF

Because the RxDmaUartBufferA[] array is declared in the main_cm4.c source code for CM4, the array is located at the SRAM from 0x08024000 to 0x080477FF

thanks, if i want to change the CM4 start SRAM address, What should we do?   Can you give me the documents about  SRAM distribution CM0 and CM4 。

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There are two linker script files, cy8c6xx7_cm4_dual.ld and cy8c6xx7_cm0plus.ld

GS004438.png

You can change the configuration at the MEMORY section in both linker script files like as following.

MEMORY

{

    /* The ram and flash regions control RAM and flash memory allocation for the CM4 core.

     * You can change the memory allocation by editing the 'ram' and 'flash' regions.

     * Note that 2 KB of RAM (at the end of the RAM section) are reserved for system use.

     * Using this memory region for other purposes will lead to unexpected behavior.

     * Your changes must be aligned with the corresponding memory regions for CM0+ core in 'xx_cm0plus.ld',

     * where 'xx' is the device group; for example, 'cy8c6xx7_cm0plus.ld'.

     */

    ram               (rwx)   : ORIGIN = 0x08024000, LENGTH = 0x23800

    flash             (rx)    : ORIGIN = 0x10080000, LENGTH = 0x80000