Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Anonymous
Not applicable

The following function is what I'm trying to use to configured the DMA to interact with the result register for my SAR_ADC component in the PSoC 63.

Cy_DMA_Descriptor_SetSrcAddress(&DMA_1_Descriptor_1, (uint32_t *) &ADC_RESULT_REGISTER);

The ADC documentation says that this register is defined as "ADC_SAR_CHAN#_RESULT_PTR" where the # is the channel you're trying to access. However, I can't find this macro anywhere in the source and it doesn't evaluate when I try and use it. Is there a different address I should be looking at? Is there a macro for it? In a last ditch effort I tried using "&ADC_1_SAR__HW->CHAN_RESULT[0]" to access the first channel results but this gives me a source bus error when I call Cy_DMA_Channel_GetStatus when the DMA throws its finished interrupt.

Any help is greatly appreciated. Thanks

0 Likes
1 Solution
MeenakshiR_71
Employee
Employee
100 likes received 50 likes received 25 likes received

Hello gerald.brennan_1832881​,

What is the source width size you have configured in the DMA? I hope it is not 16-bit. ADC result register is 32-bit and you will need to make a 32-bit access to the register. Other access will result in errors.

And yes ADC_1_SAR__HW->CHAN_RESULT[0] or simply SAR->CHAN_RESULT[0] should be the register that stores result of channel 0.

Regards,

Meenakshi Sundaram R

View solution in original post

3 Replies
MeenakshiR_71
Employee
Employee
100 likes received 50 likes received 25 likes received

Hello gerald.brennan_1832881​,

What is the source width size you have configured in the DMA? I hope it is not 16-bit. ADC result register is 32-bit and you will need to make a 32-bit access to the register. Other access will result in errors.

And yes ADC_1_SAR__HW->CHAN_RESULT[0] or simply SAR->CHAN_RESULT[0] should be the register that stores result of channel 0.

Regards,

Meenakshi Sundaram R

MeenakshiR_71
Employee
Employee
100 likes received 50 likes received 25 likes received

And I have filed an internal defect ticket to fix the "ADC_SAR_CHANx_RESULT_PTR" description.

Regards,

Meenakshi Sundaram R

Anonymous
Not applicable

@msur

You were correct, in my initial ramblings it seems I configured the DMA to transfer halfword to halfword. We'll just file this away as "Could have swore I checked that multiple times". I appreciate the help! Thanks for the clarification on the result macro as well.

Thanks,

Gerald