maximum streaming rate using Delta Sigma ADC

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user_58361
Level 2
Level 2

Dear community,

For my internship, I am interested in the maximum streaming rate when using a Delta Sigma ADC to read an input and output it using a VDAC. The actual signal that will be used for the control algorithm will also have to be filtered, which might introduce more delay than I am already experiencing. Moreover, the signal will be around 80 kHz.

During testing, I saw that a sinusoidal signal of 50 kHz already has quite some phase delay with respect to the original signal, when it is outputted to using a VDAC. Is this just the limit of the PSOC5 I am using? Or am I missing some things that might give me better performance? For reference on what I did, see the figures below (yellow is signal generator, blue is VDAC). Also, the project has been attached.

ADC_DMA_VDAC_1kHz.png

ADC_DMA_VDAC_50kHz.png

With kind regards,

Jim

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1 Solution
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

Jim,

I see 4 clocks delay between the input and output. Somewhere in the DelSig-ADC's datasheet is mentioned that it needs 4 clocks to "prime".

Since the output (VDAC8) is already 8-bit, try to reduce ADC's resolution to 8-bit and rise sampling frequency to the max to improve frequency response.

Due to intgrating nature of DelSig-ADC, there will always be a delay. It's intended frequency domain is <20kHz. For 100+kHz domain consider  using SAR-ADC.

/odissey1

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3 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

Jim,

I see 4 clocks delay between the input and output. Somewhere in the DelSig-ADC's datasheet is mentioned that it needs 4 clocks to "prime".

Since the output (VDAC8) is already 8-bit, try to reduce ADC's resolution to 8-bit and rise sampling frequency to the max to improve frequency response.

Due to intgrating nature of DelSig-ADC, there will always be a delay. It's intended frequency domain is <20kHz. For 100+kHz domain consider  using SAR-ADC.

/odissey1

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Dear Odissey1,

Thank you for the response! I will take a closer look into the SAR-ADC for my application.

With kind regards,

Jim

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Jim,

according to the Datasheet, in 16-bit continuous sampling mode, the max sampling rate is 48kHz, but the bandwidth is only 11kHz (~1/4). I suspect that is what you observe. Switch to 8-bit mode and use 384 kHz sampling rate. 

pastedImage_0.png

Also turn off input buffer to see any effect on delay.

pastedImage_1.png

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