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PSoC™ 5, 3 & 1 Forum Discussions

alro_2373731
Level 1
Level 1

I am reading the CyResetStatus and it appears to stay after reading it,  should I manually set it to 0 after reading?

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Bob_Marlowe
Level 10
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Level 10

The status information will get updated at the next reset, whichever the cause might be.

Bob

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Bob_Marlowe
Level 10
First like given 50 questions asked 10 questions asked
Level 10

The status information will get updated at the next reset, whichever the cause might be.

Bob

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StKr_1203736
Level 3
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Level 3

Ref: PSoC 5LP

I think you are confusing CyResetStatus, a RAM variable, and RESET_SR0, a hardware register. Reading the RAM variable will not result in it being reset.

Reading RESET_SR0 directly is supposed to result in it clearing, but maybe or maybe not the 2 upper bits? The documentation is hopelessly contradictory.

I think part of the reason for confusion here is that Cypress documents the physical hardware separately from the firmware that uses it. At the hardware level, RESET_SR0 supposedly clears when read. Except those upper 2 bits, which may not. Or maybe they do.

But RESET_SR0 is read by firmware during the boot process, and the value is supposed to be stored (via an intermediate transfer to CYREG_PHUB_CFGMEM23_CFG1), so the firmware that you write never has access to the value of the register before it is cleared - only a copy of it. Which may or may not be further manipulated by the boot firmware.

See Cm3Start.c

For unknown reasons, my firmware configuration (#defines) is such that the intermediate transfer never occurs, to the CyResetStatus value is not meaningful.

My attempts at getting Cypress to address this have been met with very loud silence.

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