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PSoC™ 5, 3 & 1

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Anonymous
PSoC™ 5, 3 & 1
This blog post tells you how to observe memory locations in the debugger watch window. This is useful if you want to group together and view separate ... Show More
RaAl_264636
PSoC™ 5, 3 & 1
Hello,is it possible to use the carry output of a datapath ADD/SUB operation as the shift input in the same cycle? Regards Show More
RaAl_264636
PSoC™ 5, 3 & 1
Hi,according to the 5LP reference manual the datapath outputs are registered, but it's also possible to use the combinational signal. Unfortunately, I... Show More
T0ma
PSoC™ 5, 3 & 1
I am using psoc5lp-cy8c588lti. I am trying to do the example with UART and ADC, CE195277_ADC_and_UART. I connected pin P[0] to VDD. The problem is I d... Show More
ToTa_1077931
PSoC™ 5, 3 & 1
Hi Infineon expert: I build the USBFS_HID example code  and try to program to CY3295-MTK kit, but  it alway shows an error "Error: dbg.M0023: There wa... Show More
vnguyen28
PSoC™ 5, 3 & 1
Hi! When I create a new project for psoc 5 LP. A window pops up saying cy_isr_v1_71 datasheet is not available in English. After placing an Interrupt ... Show More
Vladkar
PSoC™ 5, 3 & 1
Hi, I am using PSOC5 LP in my design and have USB interface with external Windows based application. Is it possible to use Python script to access to ... Show More
LucaD
PSoC™ 5, 3 & 1
Hi, during the last 2 years we face problems in purchasing Psoc5LP, CY8C5888AXI-LP096 microcontrollers. So we start using different part number of the... Show More
PeSe_1509996
PSoC™ 5, 3 & 1
Dear Bob, First of all thanks your Matrix keypad component. To cut the story short: it's works as expected but I've two annoying problems :   1.) only... Show More
KevinE
PSoC™ 5, 3 & 1
Hello, I have seen many others having a similar issue, but wanted to post in case my issue is slightly different. I am using PSOC5LP I2C Master Mode w... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.