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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
One of following method will resolve this problem, try these methods until the problem is resolved:-    Method 1:-    Register the vbscript.dll module... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi Everyone,.    I want to use capsense chip as a slave with I2C comminication. There are five capsense button. If  I pressed first button  1. led wo... Show More
Anonymous
PSoC™ 5, 3 & 1
 The range of the ADC will be (Negative Input)+/-(x*Vref).(x can be 1/2, 1/4, 1/8, 1/16, 1, 2 or 6)    The Vref can vary between 0.9 to 1.3V. Because ... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi,         The RTOS supported by PSoC 5LP are as follows    1) Micrium uC/OS-III    2) freeRTOS V7.6.0    3) SEGGER embos V3.88f1         Thanks,   ... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hello there, I have a project where I want the PIR motion sensor to detect motion, take the output of the PIR motion sensor and send it into psoc, tr... Show More
Anonymous
PSoC™ 5, 3 & 1
In THA, I see a variable offset in the output. The offset is: +10mV at 0V input and -30mV at VDD input. what is the reason for this behaviour? How to ... Show More
Anonymous
PSoC™ 5, 3 & 1
While trying to use the alternate SWD pins of the PSoC 5LP kit- the USBIOs which can also be used for programming, we saw an unusual behaviour. We wer... Show More
Anonymous
PSoC™ 5, 3 & 1
The USBFS_Start API description does not mention about the use of the second argument. The argument enables / disables the internal regulator between ... Show More
Anonymous
PSoC™ 5, 3 & 1
The USBFS_Start API description does not mention about the use of the second argument. The argument enables / disables the internal regulator between ... Show More
Anonymous
PSoC™ 5, 3 & 1
PSoC Creator has an option to export to other IEDs like, IAR Work Bench. Before exporting the project, make sure of the following settings in .cydwr  ... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.