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PSoC™ 5, 3 & 1 Forum Discussions

AsRa_264661
PSoC™ 5, 3 & 1
Hi Everyone,    I did not find the place to post my RF chip related question in forum so i am posting here.    I have choosed  "CYRF69103" Chip for my... Show More
Anonymous
PSoC™ 5, 3 & 1
I have 2 questions?    Is the Suite USB 3.4.7 the latest version?    Which is a USB driver for Windows 7? (There are only w2k(for 2000), wlh(for Vista... Show More
Anonymous
PSoC™ 5, 3 & 1
Is it possible to define an external command to be called each time I build my project? You see, I want to compile in values from my revision control ... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hello I made a code that use addition, subtraction and multiplication Here is the code         PART 1:    if (((atoi(anio)-1) % 4) == 0){    unix_Ti... Show More
Anonymous
PSoC™ 5, 3 & 1
I have the CY3214-PSoC-EvalUSB development board and I've been making the Capsense example (5.1 - My First Code Example) as outlined in the user guide... Show More
Anonymous
PSoC™ 5, 3 & 1
 I used CY8C24533,CY8C27643 and CY8C29666, but only CY8C29666 save data to the E2PROM, if the address is wrong, the program area will be destroyed, su... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello everyone. I'm a newbie with PSoC, and I have a simple question (but with a hard solution, I think).    I'm using PSoC 3 in my little project. I'... Show More
Anonymous
PSoC™ 5, 3 & 1
how much is the flexibility of psoc about implenting with UDBs    is there any way to have more than 192 UDB in psoc5lp    i have an project in verilo... Show More
Anonymous
PSoC™ 5, 3 & 1
        Hi, I want to know how can I make an analog inverter in PSoC 3. By an inverter, I mean nothing more than changing the sign. If Vin=+2, the inv... Show More
AlVa_264671
PSoC™ 5, 3 & 1
SFR
Hi every one !    Please, can someone explain me how I shoud read Table 2. PSoC 3 8051 SFR Map at      PSoC® 3 – 8051 Code and Memory Optimization    ... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.