PSoC™ 5, 3 & 1 Forum Discussions

 I think I know the answer (from lookng at the data sheets etc.) but before I start to re-think my overall architecture:

Can a PSoC5(LP) provide USB Host (not necessarily OTG) capability itself or must I use a separate USB host chip?

I need to provide USB Audio host capability for a design (so I can plug in headphones, speakers etc.) and I'm trying to keep the part count down. I don't need hub capability. I know I can use the PSoC as a USB 'device'.

Thanks

Susan

 Hi,

I'm attempting to emulate a multi channel ADC using PSoC 5. I have it set up using a Amux Sequencer with the output leading to the Delta Sigma ADC. I've tried setting the ADC to run in multisample mode and stopping the conversions before switching the channels. I then switch the channels and start the conversions again. When I do this, I get the same result for both channels. That is, I always get the result from channel 0, not channel 1 - even if I say "next channel". 

However, if I set the Delta Sigma ADC to continuously run and add a 100 us delay after the channel switch then I see the correct output. 

Is there some know bug for using an Amux with the ADCs? The amux data sheet does not list a settling time or any necesssary information. Any suggestions? My goal is to get the period as low as possible, so have a delay is not ideal.

Thanks

Hi All

I am starting the things of porting FreeRTOS on PSoC 5. I am creating this thread to invite and interact with all the people who are working on RTOS with PSoC. People with the experience of porting RTOS on PSoC are requested to share their knowledge starting from the scratch, just like explaining to a rookie. People like me, who are in rookie catagory, please feel free to put on any kind of RTOS+PSoC related queries. As an ice breaking session, I put my first query as a rookie here:

Anyone who will share RTOS concepts (FreeRTOS would be more appreciable, but any RTOS would do here) related documentation, tools, weblinks and reference books would be heartily appreciated.

Happy RTOSing, buddies.

Regards

Shaunak the RTOS+PSoC Rookie

 who is running the betting pool on what's  coming?

PSoC 4 with usb and more 'stuff'? This would fulfill the original PSoC 4 we were teased with by the CEO.

PSoC 5 with Ethernet? (just as my ethernet solution starts selling to customers)

PSoC 7 with ...? As teased in eetimes (??) a year or so ago.

Any other ideas? 

Ed

Hi  there!

May be someone can help me with some silly thing.

I've attached a file with a simple project that consist in the reading of an array of 4x4 FSR.

The project started to operate ok, BUT AFTER DOING SOME CHANGE  that I cannot remeber,  the system make correct reading of each  FSR,  but  those FSR which are not  pressed give me a redout  which are oscillating betwen 0x00 and 0xFF.

I have tried  to connect ADC input to Vdda  and Vssa and either situation do not stop that ocillating values.

Really I Would neeed  some help.

Thank you very much in advance.

The PSOC 3 Counter datasheet states that, for UDB implementation in one-shot mode, the counter will stop at terminal count and reload.  If "Reload on TC" in the configuration window is unchecked, does this prevent reloading in one-shot mode?

Thanks.

 I have a resource constrained design, where it would be nice if I could "reverse" several SPI Slaves to be SPI Masters.

Note that there is not enough space to fit both the SPI Slaves/Masters into the design and use multiplexers to the pins.

This isn't bidirectional SPI, i.e. I still have dedicate MOSI/MISO lines, but I would like to reverse them (as well as reverse the drive of the SCK/SS_n lines).

One possibility I had been wondering about is whether I could have a 2nd program on the PSoC's EEPROM that I could soft-boot to, after the first design is complete?

- I don't want to reprogram the EEPROM though, as that would cause too much wear on the erase cycles.

thanks for any suggestions.

A.