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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
The interrupt on capture box is disabled for the fixed function timer.         I assume this function is not available on fixed function timers but th... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi,    I trying to get a SPISlave to tranfer data to  an array via DMA.    It should be 2 byte per burst, with transfer count =2.Every burst need new... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,    I am considering the design of an interface device (board) that essentially will make multiple USB devices appear as one USB device.     Just a... Show More
Anonymous
PSoC™ 5, 3 & 1
I'm new to PSoC microcontrollers, and just started using the PSoC 5LP.     I'm wondering how to interpret the timer interval values captured from a ti... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,    I probably missed this somewhere, but is there a way to be notified by email when new topics are posted?  I can't see to find an option for thi... Show More
Anonymous
PSoC™ 5, 3 & 1
I saw that these wonderful certified drivers take care of the few issues that were found with the Windows standard USBerial drivers. The drivers thoug... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hey guys i am interfacing arduino board with capsense MBR3.My task invovles as follows can anybody just  give me an idea as to how to go about:    if... Show More
ShJe_286301
PSoC™ 5, 3 & 1
When I use the CSD2X make a capsense application , the baseline of the sensor is always zero. Is this correct ? How to tune it? Show More
IoVo_297831
PSoC™ 5, 3 & 1
Hi all,    Our target application requires digital filtering of 14 sensors, ie 14 IIR filters (4rth order BPF). Can we implement more than 2 filters w... Show More
Anonymous
PSoC™ 5, 3 & 1
 I need to make a I2C slave without subadressing using the CY8C21534. The data to read and write is always 2 byte so with every read and write, these ... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.