PSoC™ 5, 3 & 1 Forum Discussions

 hey all,
I am trying to connect my psoc 5lp kit to GSM SIM900 Using UART 
So I've Connected   Psoc's UART Tx to GSM Rx and vice versa on 9600 BaudRate 
When I send a Dial AT Command using UART_PutString("ATD9546213"); nothing Happened 
Can any one Help me PLZ 

Thanks all,
 

New to the forums, just started using PSoC and the board that I have. Currently working an small project, as we are supposed to use an on board potentiometer to adjust an  on board LED brightness. We are also supposed to report the 16 bit value to the LCD character display. I have managed to perform both of these steps, however there appears to be some sort of noise, as my least significant digit fluctuates.

Source Code:

 int main()

{

LCD_Char_Start();

PWM_1_Start();

    ADC1_Start();

    Clock_1_Start();

    uint16 ADC_Val;

    char buffer[5];

    for(;;){

        ADC_Val=ADC1_Read16();

        PWM_1_WriteCompare(ADC_Val/65);

        sprintf(buffer,"%04x",ADC_Val);

        LCD_Char_Position(0u, 0u);

        LCD_Char_PrintString(buffer);

    }

}

Any suggestions?

Thanks in advance.

Hello Community,

it seems a bit useless, but I can connect a bidirectional Pin with another in PSoC-Creator. Is it possible to pass trough a digital signal e.g. flashing an eeprom? Does anyone has experience with that?

Thank you and best regards,

HeDo

 Hi

I'm working with an audio project, and I don't know how to get 24 bit resolution from the filter to the VDAC.

My issue that the vdac is 8 bit maximum and I need 24 bits. 

Can I plays 4 vdacs in paralell or can I use current DACs with diffrent resistors?

How can I change the resoltion of filter output?

Does  someone knows what is the normal resolotion of audio?

Thanks a lot

Waiting for your kind help

 Hi there !

Anaybody knows how to get  again PSoC 3.0 ?.  I think is about  the last Service pack version. 

The rason for get again that verson is because I have an application that was working spectacular in PSoC 3.0 

and doesn't  want to work wiith f PSoc 3.1

It is about RF tranceiver  nRF24L01P breakout board.

The  only component used in the design is a SPIM 2.40.

I would like to get PSoC3 3.0 to verify if it is some mistake from myself.

Thank you very much.

 I've read AN2015, and several forum posts, and I have some questions left over.

 Flash protection is 3 levels.  0= unprotected.  1=external reads disabled. 2= external read/write disabled. 3= external read/all writes disabled.  Levels 0,1,2 allow the cpu  to write internal flash (to allow, for example, emulated eprom)

  I've read on forums that even with level 3, you can erase the chip, and also have read that with level 3, you cannot erase the chip.

  There is a psoc4 document (KBA87495) that indicates there are other protection modes.  Maybe only for PSoC 4.

  So, my question is, based on the readers experiences:

1) Is level 1 enough protection to prevent people from seeing my code?

2) If I program level 3, is my processor forever bricked if something is wrong?  (With Kill on PSoC4, that appears to be true)

3) At what level does debugging stop working, or since it comes through the SWD port, does debugging *always* work?

thanks!

 Hello,

I've run into some interesting bugs in my code migrating from Creator 3.0 to 3.1. So, to get a better handle on things (and perhaps discover some latent bugs) I am wanting to use PC-Lint. It doesn't appear to be natively supported by the Creator IDE. So, any of you had experience utilizing PC-Lint with Creator 3.1? I'm trying to get an idea of complexity and caveats.

Thanks!

 Hi,

I'm Trying to implement an algorithmic delta-sigma modulator using PSoC.  An algorithmic delta-sigma modulator is a first order delta-sigma modulator plus a S/H device. It divides the Analog to digital conversion to a few steps in order to reduce the necessary number of samples and should work for a medium resolution (8-12 bits), See left side of attachment.

As A Modulator I Tried using Kees first Order delta-sigma modulator in the following link: 

http://www.cypress.com/?app=forum&id=2492&rID=76867

The modulator digital output works fine (I used a Counter to check), but when I use an ADC to sample the modulator  analog output (the output of the integrator) I can't make sense of it. I use the modulator settings with Vref=1.024  so that the input voltages would be between 0.5*Vref and 1.5*Vref, so I expected the output voltage to change also symmetrically around Vref. In practice I see that when I Insert A voltage larger than Vref than the modulator output is always larger or equal to Vref. When I insert a voltage smaller than Vref than the output voltage is always smaller or equal to Vref.  Also, I noticed that the span of the integrator output is always smaller than the span of the modulator input. for example, if the input is 1.5V the modulator output only got as high as 1.3V.

I think I can understand the reason for the smaller output span of the integrator if the "Integration Capacitor" is larger than the "Sampling Capacitor", but I can't figure out why the integrator Voltage isn't symmetric around Vref. Kees modulator Uses an SCBlock (from the analog primitives library). I can't find a good documentation for it, the  best thing I found was this graph from the PSoC 5 TRM:  http://www.cypress.com/?docID=46050    (page 308)

See a copy of the graph in the left side of the attachment.

I don't fully understand the Configuration from the TRM. I get the (C2+C4+C5) is the Integration Capacitor and C1 is the Sampling Capacitor, but what is C3 for?

I would appreciate some help to understand the TRM Modulator configuration and why I get Odd Results when measuring the Analog voltage in the Modulator Integrator output.

Thanks,  

       Peli