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PSoC™ 5, 3 & 1 Forum Discussions

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PSoC™ 5, 3 & 1
  Dear Sir, for the datasheet Pin description, How can I know the I/O Pin  is UART/SPI/PWM or GPIO interface? any more pin description for I/O port? t... Show More
PSoC™ 5, 3 & 1

How long would a voltage have to be below the detection threshold to trigger an interrupt?

PSoC™ 5, 3 & 1
Hello. I've been beating my head trying to make this work.  PSoC 3 processor, ADC to DMA to memory.  Everything seems set up right but the DMA result ... Show More
PSoC™ 5, 3 & 1
Hi, attached is a simple project to test the DMA inter-spoke performance between SRAM and UDB (SPI) block. For a MASTER_CLK = BUS_CLK = 78MHz obtained... Show More
PSoC™ 5, 3 & 1


I use ADC_SAR but I can't find how can I get the time between samples. Maybe someone can help?

PSoC™ 5, 3 & 1
EDITED: Hello @EvPa_264126 , I have used your response from this link, as a start for my firmware interfacing to the ESP-8266 with PSOC5 LP.But I am h... Show More
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PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.