PSoC™ 5, 3 & 1 Forum Discussions
Hello, I am trying to create an accurate millisecond stopwatch which records the timing of external triggers. I would like to be able to record hours long samples but accurately time the stopwatch down to milliseconds.
At the moment, I feel like my counter (see attached) is not recording accurately.
For testing, my project has an internal 1s PWM, which when measured on a scope is quite accurate.
This PWM fires an interrupt, which reads my Counter (which counts on an 1kHz clock). The main loop then prints this count number to my LCD, as well as the difference from the previous reading. I have as minimal work between interrupt fire and counter read as I can.
The problem is, when I print the difference to my screen for the every 1s count read, I consistently get a difference of 993 counts, instead of the 1000 counts I expect.
Can anyone offer any advice on how to improve the accuracy of my stopwatch counter?Show Less
I’m having trouble with the Timer 3.0 (16-bit UDB) for PSoC 5LP.
What is the intended function of the compare bit in the status register?
The datasheet says it’s sticky, so it gets set to 1 when the compare condition goes TRUE, but if the compare condition remains true, does reading the status register clear the bit, or should it remain 1? My problem is that the compare condition is true (I believe), but when I read the status register the CMP bit is false.
Thank you.Show Less
Hi all, i'm trying to transfer content of an array (SRAM) to a ControlRegister via DMA CPU Request, i'm trying to transfer 1 element of the array per request, but i haven't been able to do it, it seems like it transfer all the array per request.
I understand that if i set REQUEST_PER_BURST to 1 it makes the DMA Controller to transfer 1 byte per request, so i ask for a transfer every 500ms, but when i read the content of the ControlRegister on the DMA Transfer Completed interrupt i read the last element of my array and not the element i'm expecting, as i say i'm expecting transfer 1 element per request, not all 10.
Does anybody had test this kind of transfer?
I haven't found any example or question similar on the forum, find project attached.
Thanks in advance
Hi, I'm designing a 'hardware only' 3 channel DAQ system using an Analog Mux, DelSig ADC, and DMA. The ADC is hardware triggered at a 500us rate, with a channel sample rate about 20 times faster. (I'm sampling a 3PH power line). A uint16 by 3Channel by 1K circular software buffer is filled via DMA. The hardware and DMA are working just fine.
My problem is at some asynchronous time, a hardware interrupt is generated and I need to transfer the ADC circular software buffer to another memory location for processing. To do this I need a Head Pointer into the buffer. The PSoC 4200M has the API function 'CyDmaGetDescriptorStatus' which returns the CYDMA_TRANSFER_INDEX from the Transaction Descriptor. I need this functionality from the PSoC 5LP DMA v1.70 component.
2nd, (less Important question) Is it possible to configure multiple linked TD's that would allow DMA to fill 3 separate uint16 by 1K circular ADC buffers, (one for each channel), so I don't have to deal with interleaved channel data in software? I have reviewed the 'DelSig_16Channel' example but it is 1-dimensional: (1 sample per channel), I need a 2-dimensional solution: ( 3ea 1K circular buffers).
Note: the ADC circular software buffer is always full, so I don't need a Tail Pointer, and I don't want any ISR involved with the hardware ADC sampling.
Gary BeamShow Less
I've somewhat successfully integrated the emfile component into my project and exported my data to my SD card. I am currently not meeting my time constraints and I am receiving gapping data on the sd card because of the lengthy writes.
I have 3x44kB arrays I need transferred ever second, after sending that through sprintf() with commas and whatnot that turns into around 250kB+ per second.. is this possible? I would assume it is but I cannot make it work with the emfile component. Am I missing something?
I did come across other libraries that claim to have better read/write times it seems (here: https://code.google.com/p/psoc3-5-sdcard-library/ ), but I would rather not go to the trouble of all that if the emfile could be modified/adjusted in a way to make it work. Even those still sound slow compared to modern SD r/w speeds. I am using a class 10 micro which is capable of up to 10MB/s
thanks in advance,
I have some external SRAM I've hooked up with the EMIF component. What I want to know is if it's possible to perform direct operations on values stored in this SRAM.
Basically I have some arrays that are so large I cannot store them on the internal SRAM but I want to use functions that take in the pointers and perform some computations on these arrays..
int32 my_array; //stored on the ext SRAM
Is this possible? I know I can transfer the data to the internal SRAM but I want to avoid doing this as I have many arrays I have to do it to in a short amount of time.
ADC -> DMA -> DFB( A^2+(A+1)^2+(A+2)^2+......+(A+n)^2= sqrt(X) ) -> DMA -> Variable
Do you have to make examples, please? I could not somehow.Show Less
I have created a small test program (attached) that runs on the CY8CKit-050.
Basically I have a UDB PWM that triggers an interrupt on the terminal count and both of the compare events (which are set up to be about 1/3 and 2/3 through the period). The PWM ISR sets a pin high and also starts an ADC conversion (which itself has an ISR that drops the pin and also outputs the ADC value).
The idea is that I want to time turning on a LED with the PWM signal and then get an ADC reading while LED is lit (and also later when the LED is not lit for comparison purposes).
The issue I have is that the pin signal is raised about 3uSec (as seen on my scope) BEFORE the PWM output pin goes high. I would have expected the PWM signal to go high, THEN the ISR to trigger and THEN the code to set the pin high be executed which would ensure that the ADC sampling is started after the LED is lit.
As it stands, the processor seems to be calling the ISR and executing code before the UDB is actually raising it's output.
Is this correct order of events? Is there a way to achieve having the ISR called AFTER the PWM event?
Edit: By way of a cross-check I changed the PWM form UDB to Fixed and the issue remains.Show Less
QP-nano has been specifically designed to enable event-driven programming with concurrent hierarchical state machines (UML statecharts) on low-end 8- and 16-bit single-chip MCUs and DSPs. The framework is ideal for medical and military/aerospace applications, as it offers excellent traceability from modern design to code.
QP-nano consists of a universal UML-compliant event processor (QEP-nano), a highly portable event-driven framework (QF-nano), and a tiny preemptive run-to-completion kernel (QK-nano) as well as a cooperative kernel.
The QP-nano framework can manage up to 8 concurrently executing hierarchical state machines and requires only 1-2KB of code (ROM) and just several bytes of RAM. This tiny footprint, especially in RAM, makes QP-nano ideal for PSoC applications. Please refer to the www.state-machine.com website for more information.
Complete QP-nano development kit for the Cypress PSoCEVAL1 evaluation kit is available for free download from www.state-machine.com/psoc.
www.state-machine.com Show Less
Hi, new guy here.
I was wondering if I could (re)use the KitProg connection to my PC as a diagnostics channel for debugging. I want to send debug messages from the board to the PC (terminal).
Using the CY8CKit-059 for the 5PL.Show Less