PSoC™ 5, 3 & 1 Forum Discussions
I have a PSoC3-based project to control two motors via PWM.
Currently the PWM block on PSoC Creator is set to work with an input clock of 2MHz, and dividing the period into 100 samples gives a resulting period of 50us and therefore 20kHz.
When I send a command to the motors (which use 24V) they get a step (from 0V to 24V) which activates them abruptly.
Is there a way to implement this via software on PSoC Creator or via firmware to not have the step but something smoother such as a ramp?
I'm using a PSoC5LP where STDIN/STDOUT is retargeted to the UART by corresponding _read()/_write() functions. This works as expected. Now, I need to extend the functionality so that it's possible to convert the newline characters at run-time for both receive and transmit.
For transmit, it is easy to implement since the character to be sent is known prior to sending it. For example, if all outputs by printf() are using '\n' (linefeed character LF = 0x0A), but the system I'm connected to expects '\r\n' (carriage return + linefeed, CRLF = 0x0D0A), I can send the carriage return prior to the linefeed character. The same for the case that the application uses CRLF, but only CR or LF has to be sent.
For receive, this is somewhat harder to implement. I'm not using scanf() functions, the application needs to process each incoming character separately. So the getchar() function is used and therefore calls to _read() are always performed with a length of one character. Now I wonder how I can translate incoming LF, CR, CRLF and even LFCR (uncommon, but possible). Replacing LF by CR and vice versa shouldn't be a problem. Using LF only as newline for the application would imply to always simply throw away the CR if CRLF is received, but I want to keep the option that CR is still recognized if the following character is not a LF.
Since the current structure of the UART API doesn't allow to insert characters into the transmit/receive buffers by the UART interrupt, the only way I could imagine for solving this is to have a small state-machine within the _read() function handling those cases. Any other ideas?
The PSoC5 datasheet shows a table with port assignments for the CY8C5888FNI-LP214T device (BGA-99). None of the additional pin functions (i.e.: SIO, XTAL, I2C, SWDxx, OPAMPx, JTAG) shown for the QFN or TQFP packages are shown for this BGA device. None of the power domains are identified either. See the image below:
Where might the alternate pin information for the BGA-99 be available?Show Less
for the datasheet Pin description, How can I know the I/O Pin is UART/SPI/PWM or GPIO interface?
any more pin description for I/O port? thanks.
Hello. I've been beating my head trying to make this work. PSoC 3 processor, ADC to DMA to memory. Everything seems set up right but the DMA result memory location never gets the value. If I read the ADC directly I get a good value, so the ADC is working. The ADC interrupt is firing because I can breakpoint it there, and I can see that the ADC_convDone flag is set.
I've gone round and round with the documentation and think everything is set up right. But the DMA screens in Creator 4.4 do not exactly align with the documentation.
The one thing I cannot find is exactly how to set up the TD for my scenario. I have the ADC converting continuously, and the TD is set up as: Endian=off, trq=off, nrq=off, length=1, source ADC_DEC_SAMP_PTR, Inc=off, dest=memory value, Auto Next=off, and Next Td=End.
I have tried Auto Next=on and Next Td=0, but that does not change anything and I don't think it is right anyway.
So here are my setup values:
/* Defines for AzDma */
#define AzDma_BYTES_PER_BURST 1
#define AzDma_REQUEST_PER_BURST 1
#define AzDma_SRC_BASE (CYDEV_PERIPH_BASE)
#define AzDma_DST_BASE (CYDEV_SRAM_BASE)
/* Variable declarations for AzDma */
/* Move these variable declarations to the top of the function */
/* DMA Configuration for AzDma */
AzDma_Chan = AzDma_DmaInitialize (AzDma_BYTES_PER_BURST, AzDma_REQUEST_PER_BURST,
HI16 (AzDma_SRC_BASE), HI16 (AzDma_DST_BASE));
AzDma_TD = CyDmaTdAllocate ();
CyDmaTdSetConfiguration (AzDma_TD, 1, CY_DMA_DISABLE_TD, 0);
CyDmaTdSetAddress (AzDma_TD, LO16 ((uint32)ADC_DEC_SAMP_PTR), LO16 ((uint32)AdRes.Az));
CyDmaChSetInitialTd (AzDma_Chan, AzDma_TD);
CyDmaChEnable (AzDma_Chan, 1);
What I want is for the memory location to get overwritten with each conversion - for now.
Thanks for any insight, Russ