Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob

PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
 Hi,         I have some hardware processes the raises some interrupts. The software part must wait for all interrupts completed.  But I have no knowl... Show More
Anonymous
PSoC™ 5, 3 & 1
I'm working with the CY8CKIT-059 5LP Prototyping Kit. I added a PWM in FF mode to my project and connect the output to the onboard Blue LED on P2.1. T... Show More
MaKo_1526276
PSoC™ 5, 3 & 1
I added CyPmSleep () to my program with reference to the sleep timer sample code.But did not wakeup.As a result of investigating the cause, it was fou... Show More
MiSi_284936
PSoC™ 5, 3 & 1
General item. Have used the Eval Board off and on to set up a quick test of an actual product we make.Really can't beat the price.Then sometimes it so... Show More
KrDe_284951
PSoC™ 5, 3 & 1
Hello,Has anyone ported the IoT libraries to access the Microsft Azure platform on a PSoC-3 platform?Thanks,Kris Show More
JoSa_3786491
PSoC™ 5, 3 & 1
Hello PSOC community,I've attached a bare bones dual application combination projects that I made. It represents the basic setting for my real project... Show More
KyTr_1955226
PSoC™ 5, 3 & 1
Hi all,I have a question about bootloader interfaces.  In my current project I want to be able to load over either UART or USB HID interfaces.  I woul... Show More
MiNe_85951
PSoC™ 5, 3 & 1
Hi,We have a question about IMO of PSoC5LP.PSoC5LP Datasheet URLhttps://www.cypress.com/file/45926/downloadThe following specifications are listed on ... Show More
gisc_1091076
PSoC™ 5, 3 & 1
I development a firmware, with the Psoc 5, that it need to received data from the I2C when is in sleep. I have a problem, that casually the device res... Show More
mish_288636
PSoC™ 5, 3 & 1
Hi, so we are seeing a board-to-board variation on the ideal value for the Vdac for the Voltage Reference Source for the Capsense CSD component, ver 3... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.