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Hello Every Body,
I am using two dithering VDAC having same clocks. Now the problem is, one dithering VDAC is generating correct voltage but the other is not.
Please see pic attached.
Looking forward for your reply.
Regards
Awais
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PSoC 5LP
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If the board is CY8CKIT-050 PSoC 5LP Development Kit then P2_0 is connected to the LCD module
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Helle maknight,
Into your design, one VDAC works correctly.
Could you check the pin configuration of the output?
[NOTE] May be you need to disconnect all external components.
An other things, please check into your code that all your VDACs are started.
yours,
Rob1
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Dear Rob1,
Thank you for your reply.
I already disconnect all external components and checked the outputs but the problem is still there. Also, the components are started correctly.
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Hi maknight,
About the VCCIO of the bank used by your VDAC outputs: Does it the same "bank" for the 2 VDACs?
Could change the output pin (of your FAIL VDAC) to try on different bank?
Could your try the same bank used with your first VDAC? This one works!
yours,
Rob1
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"About the VCCIO of the bank used by your VDAC outputs"
What does this means? from where i can verify it?
regards
Awais
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What development card do you use and what pins are used for the VDAC outputs ?
Do you measure the output with open pins or with the circuits indicated in you posted diagram?
Is the output static or varying when you measure it?
Can the Opamp_Ex_Neg_CHA influence the measured outputs?
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Hi,
I am using PSOC 5LP (LP035), and I using pins P1_5 and P2_0. I measured it with both of them. Both have certain offset too.
The output was varying(with circuit) before but now I placed a voltage follower. That problem is gone now. Now it is static.
No, I don't think so that the Opamp_Ex_Neg_CHA can influence.
Looking forward for your suggestion.
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If the board is CY8CKIT-050 PSoC 5LP Development Kit then P2_0 is connected to the LCD module
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Oh Yes it is connected to that pin.
It is better now but the offset is still there.