What are expected Issues of exceeding thermal limits

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GrCa_1363456
Level 6
Level 6
50 likes received Beta tester First comment on KBA

Can Infineon share the major issues that may occur if the maximum operating temperature is exceeded when using a PSoC 5?

I am interested in issues at temperature with all MCU technologies, but specifically with those that include internal Analog and Digital peripherals.

Specifically, will there be impacts to device speed, A/D resolution, Op Amp performance, memory retention, clock function, wake times....

Greg

 

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DennisS_46
Employee
Employee
100 sign-ins 50 likes received 50 solutions authored

Greg:
Len is mostly right.
Flash will lose retention, but slowly.
Opamp and comparator offset voltages will get worse.
The internal bandgap reference will get worse; this affects lots of stuff including the clock,
so clock accuracy will degrade.
Chip may fail to operate at high clock rates (so, lower the IMO).
Routing parasitic resistance will go up, this would slow down analog signals slightly.
Opamp noise is dominated by 1/f, so at low frequencies, broad band noise increase is not significant.
---- Dennis Seguine
PSoC Applications Engineer

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Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Greg,

I'm not an Infineon employee.  They would be the better authority for your questions.

Before they weigh in I have some general observations from my experience.

As internal temperatures increase, silicon tends to get a little faster (frequency bandwidth). However silicon traces and silicon switches also acquire more resistance. 

This means for digital circuitry that the rise and/or fall times get longer which can nullify the frequency gains. 

For analog circuits temperature will adversely affect the switch routing switches.  Besides the added temperature will contribute more thermal noise which will be more seen in highly sensitive circuits (especially at higher gains).  ADCs at higher resolutions are going to see more lsb dithering that should be averaged out.

SRAM memory should be generally retained.  

One more general temperature statement:  All internal temperatures should be kept to 150C or below.   Most silicon junction doping formulations start to 'melt' (diffuse) above 150C.   Once the junction diffuses, it loses some of its semiconductor properties.  It becomes more like a conductor.  If the temperature is high enough, junctions will become non-functional.

FLASH memory could start losing some of its non-volatility.

A IC with an operational ambient upper limit of Ta = 85C allows for a +65C internal change so that the junction temp Tj doesn't exceed 150C.

How high do you anticipate the ambient temperature to get?

Len
"Engineering is an Art. The Art of Compromise."
DennisS_46
Employee
Employee
100 sign-ins 50 likes received 50 solutions authored

Greg:
Len is mostly right.
Flash will lose retention, but slowly.
Opamp and comparator offset voltages will get worse.
The internal bandgap reference will get worse; this affects lots of stuff including the clock,
so clock accuracy will degrade.
Chip may fail to operate at high clock rates (so, lower the IMO).
Routing parasitic resistance will go up, this would slow down analog signals slightly.
Opamp noise is dominated by 1/f, so at low frequencies, broad band noise increase is not significant.
---- Dennis Seguine
PSoC Applications Engineer