Oct 29, 2014
07:58 AM
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Oct 29, 2014
07:58 AM
I am getting a warning like this
" The design contains a combinational loop. Check the design for unintentional latches. Breaking the loop at "
can any one help me to understand this warning
Thanks
Vinay
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PSoC 5LP
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Oct 29, 2014
08:15 AM
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Oct 29, 2014
08:15 AM
You have probably connected some gates (like forming an RS-FF) which may lead to warnings like that.
Easiest for us to help you is to post the complete project here. To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
Bob