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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
Not applicable

Good day to you all,

   

 

   

I am fairly new to psoc and am currently working on a precursor to another project. The system is meant to work as follows;

   

Two pwm's are to generate a single short pulse "start" and "stop" respectively and these are to be sent to a coarse counter (I used a timer in this case) and the timer is meant to count the period between the start and stop signal (hence I used a logic 'xor' for the enable) and generate an interrupt which prints the output through the uart. But for some reason I get nothing at the output.

   

 

   

I have already tested the uart to confirm it works separately. And I have also confirmed the appropriate pulses are being generated by the pwm's with an oscilloscope so I am at a loss as to why the enable condition is not being met. I have attached the project to this post in hopes that someone can give me clarity as to what the problem could be.

   

 

   

p.s. In case you wonder where the interrupt definition is, it is in the isr_1.c page under the CY_ISR function.

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3 Replies
AnkitaS_51
Employee
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100 likes received 50 likes received 25 likes received

You can route the XOR gate output to a pin and can probe and observe whether a pulse of a width (as required in your application) is being produced or not

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JobinT_31
Employee
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25 likes received 10 likes received 5 likes given

Hello Orion,

   

The issue is with the TopDesign.

   

#1 StatusReg_D0 is directly connected to the Reset of Timer. Which is high when the signals from the PWMs are active [so Timer is in reset - level triggered]

   

#2 isr_1 will never get activated since the NOT of StatusReg_D0 is AND'ed with stop_sig. The AND output will always have low signal.

   

I had modified these in your project and attached with this comment.

   

Thanks

   

JOBIN GT

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JobinT_31
Employee
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25 likes received 10 likes received 5 likes given

My test results

   

Jobin

   

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