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PSoC™ 5, 3 & 1 Forum Discussions

PaCo_972561
Level 2
5 questions asked 5 replies posted Welcome!
Level 2

Hi - I'm having trouble getting the thermistor example (ThermistorCalc Example) to route.  The example come with the pins assigned.  That builds fine.

If, however, I unlock the 3 pins (Vhi, Vlow, VTherm) and try to build it fails, complaining not able to route the AMUX.

What is the procedure to get  this to route?  Must I select and lock the pins?  This seems like a bug.

Any experts out there?

thanks much - Paul

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1 Solution
Vison_Zhang
Moderator
Moderator 10 likes given 500 replies posted 100 sign-ins
Moderator

In special condition, when single analog pin is connected to multiple AMUX differential inputs (like VTherm), Creator analog routing algorithm may have difficult when calculating analog routing solution.  For this example, VTherm is used as positive input and negative input in two different differential pairs, so this pin should be able to connect to both Pos and Neg terminal of ADC internally, this limits VTherm pin must be assigned to pins which can connect to analog route AGL[1], AGL[3], AGL[5] or AGL[7] internally (below is the analog switch resource of ADC part).

1.JPG

So if you try any of below actions, the project can pass building.

1. Lock VTherm pin and assign it to any pin which can be connected to AGL[1], AGL[3], AGL[5] or AGL[7] through analog switch, like P6[5]/P2[5] can be connected to AGL[1]  through close dedicate analog switch.

2. Unlock VTherm pin, drag a 'Net Constraint' component in topdesign, connected it to VTherm trace and force this trace assign to AGL[1], AGL[3], AGL[5] or AGL[7].

2.JPG

3. Switch the connection order of VTherm and Vlow in differential pairs #1, only connect VTherm to pos terminal, then project can pass building too.

View solution in original post

4 Replies
PaCo_972561
Level 2
5 questions asked 5 replies posted Welcome!
Level 2

Upon further investigating I found it will route if I unlock V_hi or Vlow.  Unlocking VTherm pin fails to build.  Hope this helps.

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PaCo_972561
Level 2
5 questions asked 5 replies posted Welcome!
Level 2

I can unlock both V_hi and Vlow and it builds.  If I unlock VTherm it fails to build! 

Any clues why?

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Vison_Zhang
Moderator
Moderator 10 likes given 500 replies posted 100 sign-ins
Moderator

In special condition, when single analog pin is connected to multiple AMUX differential inputs (like VTherm), Creator analog routing algorithm may have difficult when calculating analog routing solution.  For this example, VTherm is used as positive input and negative input in two different differential pairs, so this pin should be able to connect to both Pos and Neg terminal of ADC internally, this limits VTherm pin must be assigned to pins which can connect to analog route AGL[1], AGL[3], AGL[5] or AGL[7] internally (below is the analog switch resource of ADC part).

1.JPG

So if you try any of below actions, the project can pass building.

1. Lock VTherm pin and assign it to any pin which can be connected to AGL[1], AGL[3], AGL[5] or AGL[7] through analog switch, like P6[5]/P2[5] can be connected to AGL[1]  through close dedicate analog switch.

2. Unlock VTherm pin, drag a 'Net Constraint' component in topdesign, connected it to VTherm trace and force this trace assign to AGL[1], AGL[3], AGL[5] or AGL[7].

2.JPG

3. Switch the connection order of VTherm and Vlow in differential pairs #1, only connect VTherm to pos terminal, then project can pass building too.

PaCo_972561
Level 2
5 questions asked 5 replies posted Welcome!
Level 2

Thanks for the very useful reply.  You can mark this as solved.

Paul

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