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PSoC™ 5, 3 & 1 Forum Discussions

Claudius
Level 1
Level 1
First like received First reply posted First question asked

Hello,

The PSoC5 datasheet shows a table with port assignments for the CY8C5888FNI-LP214T device (BGA-99).  None of the additional pin functions (i.e.:  SIO, XTAL, I2C, SWDxx, OPAMPx, JTAG) shown for the QFN or TQFP packages are shown for this BGA device.  None of the power domains are identified either.  See the image below:

PSoC5 TQFP-100 vs BGA-99  pin assignments.png

Where might the alternate pin information for the BGA-99 be available?

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1 Solution
Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

Claudius,

The PSoC5LP architecture was intended to be very flexible.

The GPIO pins can almost always be assigned as analog input, analog output, digital input or digital output.  Special functions/connections to UART/SPI/I2C/PWM/Timer/Counters/etc can be be assigned to nearly any of the pins.

Some special high-speed functions such as external crystal (XCO), watch crystal (WCO) and USB DM+ and DM- are hard-assigned to specific pins.  Virtually all other pins are assignable to other special functions.

Len
"Engineering is an Art. The Art of Compromise."

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BiBi_1928986
Level 7
Level 7
500 replies posted 250 replies posted 250 sign-ins

Hello.

The GPIO voltage domains are listed in datasheet table 2-2 as VIO0, VIO1, VIO2, VIO3.

The GPIO alternate pin functions are the same as shown in QFN and TQFP pinout diagrams.  This keeps migration of s/w and h/w design consistent when moving from one package to another package within the same PSoC family.  Further, the alternate GPIO functions are explicitly shown for 99 in PSoC 5LP Architecture TRM, Table 19-5.
TRM_PSoC5.book (infineon.com)

Good luck with your project.

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Thank you for the prompt response.  I understood what the multiple VIO domains were but I asked the question incorrectly.  What I wanted to know was how the various IO pins in the BGA device were associated with a given VIO supply domain.
If the additional functions of the pins assigned in the TQFP-100 package translate directly to the BGA-99 package, I took the opportunity to create an image where I did that.  The TQFP image identifies which IO (and other) pins are powered from a given VIO domain and I replicated that for the BGA-99.  If that is correct, it would be the key I need to allow me to hook things up correctly.
In the multiple times I used the QFN-68 package, the VIO1 domain was always powered by +5V and the other three domains were powered by +3.3V.  I want to do the same with the BGA-99 package because the application is essentially the same.  I will go through the additional documentation and see what else I can learn.

Hello.

Yes, you have the correct Vdio mapping in your BGA diagram.  And, you can see the TQFP Vdio quadrant correlation to the BGA footprint too.

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Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

Claudius,

The PSoC5LP architecture was intended to be very flexible.

The GPIO pins can almost always be assigned as analog input, analog output, digital input or digital output.  Special functions/connections to UART/SPI/I2C/PWM/Timer/Counters/etc can be be assigned to nearly any of the pins.

Some special high-speed functions such as external crystal (XCO), watch crystal (WCO) and USB DM+ and DM- are hard-assigned to specific pins.  Virtually all other pins are assignable to other special functions.

Len
"Engineering is an Art. The Art of Compromise."
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