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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
Not applicable

Hi.

   

I'm looking for a very simple explanation how to connect a register from a component written in Verilog to the software.

   

I don't want to read tens of pages in datasheets (tired of that already 🙂 ).

   

I just have a register in my custom component

   

module MyModule (...);

   

reg [15:0] counter;

   

....

   

endmodule

   

and I want to be able to read/write it with the software.

   

Please help!

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1 Solution
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

michael,

   

Let me re-phrase your question: "how to access a Verilog register using API call?".

   

The register created by Verilog code like this: "reg [15:0] counter" can't be accessed from C code. You need to instantiate a Control or Status Register in verilog code as:

   

 

   

     wire [7:0] control_reg_out;
    
    //do something with control reg output
    assign outp = control_reg_out; //assign module output to value stored in myControlReg
    
    
    // instantiate ControlRegister inside Verilog module using code
    // output of the ControlRegister goes directly to wire
    cy_psoc3_control #(.cy_init_value (8'b00000000), .cy_force_order(`TRUE)) //Default mode
    myControlReg(      // name of the control register
        .control(control_reg_out)  // output bus [7:0] 'outp'
    );

   

 

   

Now in the C-code you can access instantiated register:

   

        // write counter value into myControlReg, located inside bus8.v component
        // exact name of the Control Register can be found in cyfitter.h file
        CY_SET_REG8( bus8_1_myControlReg__CONTROL_REG,  counter );

   

 

   

Attached is full project and pictures showing how to locate the name of the instantiated register in the fitter file.

   

   

 

   

 

   

 

   

View solution in original post

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8 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

michael,

   

Let me re-phrase your question: "how to access a Verilog register using API call?".

   

The register created by Verilog code like this: "reg [15:0] counter" can't be accessed from C code. You need to instantiate a Control or Status Register in verilog code as:

   

 

   

     wire [7:0] control_reg_out;
    
    //do something with control reg output
    assign outp = control_reg_out; //assign module output to value stored in myControlReg
    
    
    // instantiate ControlRegister inside Verilog module using code
    // output of the ControlRegister goes directly to wire
    cy_psoc3_control #(.cy_init_value (8'b00000000), .cy_force_order(`TRUE)) //Default mode
    myControlReg(      // name of the control register
        .control(control_reg_out)  // output bus [7:0] 'outp'
    );

   

 

   

Now in the C-code you can access instantiated register:

   

        // write counter value into myControlReg, located inside bus8.v component
        // exact name of the Control Register can be found in cyfitter.h file
        CY_SET_REG8( bus8_1_myControlReg__CONTROL_REG,  counter );

   

 

   

Attached is full project and pictures showing how to locate the name of the instantiated register in the fitter file.

   

   

 

   

 

   

 

   

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Anonymous
Not applicable

Thank you very much.

   

This is exactly what I need.

   

Where can I find details about syntax/parameters of these directives (cy_psoc3_control, .cy_force_order, etc) ?

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

See PSoC Creator Component Author Guide section 4.3.4.3:

   

http://www.cypress.com/documentation/component-datasheets/psoc-creator-component-author-guide

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Anonymous
Not applicable

Thanks again.

   

It's written that this control register (and also the status register) is 8 bits. What if I need 16 bis (or more) status register? How can I do it?

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted
        In case you need 16/24/32 control or status register, split data into 8-bit buses each connected to its own control/status register. In API, read content of each register and combine result info 16-bit word. As example, take a look on the custom component here: http://www.cypress.com/forum/psoc-community-components/dds24-24-bit-dds-arbitrary-frequency-generato...   
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Anonymous
Not applicable

Isn't there another way? For 32bit values you need 4 reads...

   

How about all those API functions and pointers to registers, that return 16bit or bigger values?

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Michael,

   

those functions only for access to the UDB datapath registers. You have to instantiate a datapath first. I don't have example at hand for that...

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

While the UDBs are chainable with a handful of signals, the control and status registers are not.

   

Because the location (address) within the chip of those registers is not consecutive, there is no means to access several registers with a single instruction.

   

 

   

Bob

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