hello dear CYPRESS community,
I need to communicate (SPI) between PSOC5 (Master) and the ADC AD7195.
I have to configure the ADC and take measurements.
Is there someone who can help me and verify my code?
I search code example for this type of ADC.
ADC Sync pin not connected, MISO connect to Dout/ready, MOSI connect to DIN, sclk connect to sclk, ss not connected.
CS connect to P1_5 port of PSOC5 ( ADC_CS)
PSOC5: 5V & VDDIO=DVDD ; ADC : 5V USB AGND = PSCOC5 GND
my 'C' code:
when I ask for ADC ID , I receive x00 instead of xA6
when I ask for ADC Status Register, I receive x00 instead of x80.
when I ask for ADC configuration Register, I receive x0000A6 instead of x000117.
when I ask for ADC mode Register, I receive x000000 instead of x080060.
Can you please post your complete project, so that we all can have a look at all of your settings. To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
Apart from that: you need a SPI master, so read the SPI master data sheet to learn how it works. Then the AD7195 data sheet (page 28ff) explains how to use SPI to read and write registers and results.
I use a SPI Master , I've read the data sheets but it's my first project with CYPRESS PSOC. I'm student. I need your help.
Well, from a student I expect being able to learn from incomplete information 🙂
What you should do:
- read the data sheet for the SPI master (at least about configuration, functional description and API overview)
- maybe read the Wikipedia page about SPI
- maybe experiment with the SPI master (without any slave attached) and look at the signals with an oscilloscope or a logic analyzer
- read the data sheet of the AD7195 (the chapter from above) - this gives you a description of what to send over the SPI bus
- then try to read the ID register - it always returns 0xA6 so its easy to see whether it works or not
Im having a problem with the SPI_master also. With version 2.4 I had no problems. Many projects. All work. Now with 2.5 I cant get it to transmit well in PutArray without manually enabling and disabling the CS output. Then still there are errors due to the CS output spiking from time to time. Ive tried different Any Ideas? If you look at channel 7 which is the CS line you can see some spikes at the beginning of the transmission.
Control a pin yourself. Do not put a pin on the CS line, but manually at start and end of a transaction set your pin accordingly.
Would be good to contact Cypress directly on that behavior. Please create a support case and keep us informed.
I usually do toggle the CS pin in software because in putarray it tends to cut out in the middle of the last byte. The project does work. But I noticed that it slowed down a lot after I upgraded the component so I looked and found the errors in the CS line.
I tried different hardware and gt the same results. My question is has anyone else noticed this?
it tends to cut out in the middle of the last byte This would be reason enough to create a support case. Can you do that and keep us informed.