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PSoC™ 5, 3 & 1

gogolgoggly
Level 1
5 replies posted First solution authored First reply posted
Level 1

Hi, to get control over the amplitude of a clocksignal, RodolfoGL suggested a slim solution (https://community.infineon.com/t5/PSoC-5-3-1/control-ampltude-of-a-clock-signal/m-p/341627#M46852). Thanks Rodolf. (Its also described in AN60580 (page 15)).   

The problem is that I can't get below ~0.5V amplitude. Can someone please explain to me why?

gogolgoggly_0-1652707378062.png

 

 

 

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1 Solution
odissey1
Level 9
First comment on KBA 1000 replies posted 750 replies posted
Level 9

gogolgoggly,

Another way to produce variable 0 to 4V output clock is to use a VDAC8 and a shorting Pin (Figure 1). The Pin_1 is configured for both analog and digital output (Open drain, drives low, Figure 2) . The VDAC_1 output goes through the Pin_1, which is being periodically shorted. The output can be adjusted between 0 and 4.08V, provided by VDAC. Equivalent schematic of the circuit is shown on the Figure 3 using Pins annotation component (Pins Annotation component for PSoC5 and PSoC4 ). The VDAC is, actually, a current source, which is loaded on internal 16k resistor. Shorting its output is permitted in PSoC5.

As an alternative, an IDAC can be used, with external resistor. Using 2.2k resistor and 2mA IDAC range can provide Vmax ~4.3V and faster response.   

/odissey1

 

Figure 1. Clock output with variable amplitude (0 to 4V).

VoltageClock_01a_A.png

Figure 2. Pin_1 configuration. The pin is configured for both Analog and Digital Output (open drain, drives low).

VoltageClock_01a_PinConfig.png

Figure 3. Equivalent representation of the schematic using PSoC annotation components (Pins and Parasitics).

VoltageClock_01a_B.png

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odissey1
Level 9
First comment on KBA 1000 replies posted 750 replies posted
Level 9

The SIO output amplitude can be controlled by Vref terminal, but only down to 0.5V. It will not go below 0.5V. This is limitation of hardware 

gogolgoggly
Level 1
5 replies posted First solution authored First reply posted
Level 1

Thanks , now i have clarity.

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odissey1
Level 9
First comment on KBA 1000 replies posted 750 replies posted
Level 9

gogolgoggly,

Another way to produce variable 0 to 4V output clock is to use a VDAC8 and a shorting Pin (Figure 1). The Pin_1 is configured for both analog and digital output (Open drain, drives low, Figure 2) . The VDAC_1 output goes through the Pin_1, which is being periodically shorted. The output can be adjusted between 0 and 4.08V, provided by VDAC. Equivalent schematic of the circuit is shown on the Figure 3 using Pins annotation component (Pins Annotation component for PSoC5 and PSoC4 ). The VDAC is, actually, a current source, which is loaded on internal 16k resistor. Shorting its output is permitted in PSoC5.

As an alternative, an IDAC can be used, with external resistor. Using 2.2k resistor and 2mA IDAC range can provide Vmax ~4.3V and faster response.   

/odissey1

 

Figure 1. Clock output with variable amplitude (0 to 4V).

VoltageClock_01a_A.png

Figure 2. Pin_1 configuration. The pin is configured for both Analog and Digital Output (open drain, drives low).

VoltageClock_01a_PinConfig.png

Figure 3. Equivalent representation of the schematic using PSoC annotation components (Pins and Parasitics).

VoltageClock_01a_B.png

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gogolgoggly
Level 1
5 replies posted First solution authored First reply posted
Level 1

Interesting approaches. I will think about that. Thanks

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