 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hello all,
I have question(s) on some details in the AN2358, the Manchester Decoder implementation with PSoC1 ( I don't think the example from the AN limited to the PSoC1, surely can do on other PSoC families; but this is unrelated to question I want to ask; however the AN is old, so I post my question under PSoC 1 thread).
On P3, where it discusses the clocking to the CNTR8, VC3 clock signal / counter clock frequency: since we timing 3T/4 of bit period, it must be at least 4 times the bit rate.
But what I don't understand is the discussion about oversampling on this particular case. We only "take" a single sample, when the counter triggers the timeout of the 3/4 of the period. I don't think I understand or see oversampling here. Way I understand it, whichever frequency we chose, we still will trigger once on the 3/4ths of that period, no matter the number of ticks.
So what's the point at all increasing the frequency beyond 4x bit rate ... ?
I've seen other decoder implementations (in software) which do take multiple samples say at x16 rate, but they apply filtering on the samples. None if which I see or understand happening in this AN.
If someone could clarify that for me I would greatly appreciate it.
Solved! Go to Solution.
 Labels:

PSoC 1
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hello Denis,
I agree that oversampling may not be the correct word to use here. Selecting an x16 clock would have been more appropriate. Hope that this would clear the confusion.
Best regards,
Sampath Selvaraj
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hello Denis,
Oversampling is used when the signal does not contain clock information. In case of Manchester encoding, the data signal contains clock information also. Hence, oversampling is not used. A transition on the data signal is taken as the cue for decoding the signal.
Best regards,
Sampath Selvaraj
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hey Sampath,
Thanks for much for replying.
Is there any point then to setup the sampling timer higher than x4 the bit rate?
If I understand the setup, it is based on center sampling  taking sample as far away from transitions. So in this case it's at 1/4 or 3/4 of the bit period. (This should handle jitter around edges?)
What's the advantage of (as AN seems to suggest) suggesting going x16 the bit rate, while still taking only one sample at 3/4 bit time ?
(For tick granularity? )
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hello Denis,
I am referring you to page 4 of this Application Note.
"VC3 (counter clock frequency) counts threefourths of bit time; this requires a VC3 clock at least four times the bit rate. However, tolerance must be added to cope with intrinsic precision and jitter of the transmitter and receiver.
Selecting an x16 oversampling rate gives more than 10 percent frequency tolerance on each side and is the retained value for the design. "
Best regards,
Sampath
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hi Sampath,
From your first reply on my question:
In case of Manchester encoding, the data signal contains clock information also. Hence, oversampling is not used.
I guess I'm not understanding then what the AN means in the quote from your last post, as it looks conflicting.
Selecting an x16 oversampling rate gives more than 10 percent frequency tolerance
I sure would like to understand this better. How do you achieve this x16 oversampling with taking only 1 sample? (As in the AP's implementation).
(If you want to redirect me to read on this somewhere else that's Ok too; if it contains the needed info).
 Mark as New
 Bookmark
 Subscribe
 Mute
 Subscribe to RSS Feed
 Permalink
 Report Inappropriate Content
Hello Denis,
I agree that oversampling may not be the correct word to use here. Selecting an x16 clock would have been more appropriate. Hope that this would clear the confusion.
Best regards,
Sampath Selvaraj