PSoC™ 5, 3 & 1 Forum Discussions

[Wiwaldi]

Hello @ All, 

I ask for your help. I can't get a clean push-pull solution (e.g. 2 blocks from TCPWM). Chip CY8C4245 PSoC Creator 4.x. I've looked at all the examples and docs but haven't found a solution.

Does anyone have a project or can anyone help me?

[Len_CONSULTRON]

@Wiwaldi 

You mention: "... I can't get a clean push-pull solution ..."

I'm assuming when you say "push-pull" you're asking for a PWM and PWM-inverted signal.  Correct?

What do you mean by a "clean" solution?

For future reference:   Your question about the PSoC4 would be better placed in the PSoC4 forum.

[Wiwaldi]

@Len_CONSULTRON  No. I mean that both duty pulses on the separate channels should be right in the middle of one another. See first picture.

I have tried all variants (two TCPWM Blocks) with right, left, center align, dead time, reload through line_n ,  etc.

Unfortunately without 100% success.

I change the software period and compare (duty from 2 to 30% of 100). The duty impulses shift and symmetry is lost (see e.g. second picture).

As a result, the electronics go haywire.

There must be a very classic solution. Unfortunately I couldn't find it 😞 .

P.S.: I have already written in PsoC 4 too.

[odissey1]

The project below shows one of the possible solutions. It is drafted for PSoC5 (as we are in the PSoC5 forum), but can be reproduced using PSoC4 as well. The idea is to multiplex PWM output between 2 phases using a Lookup Table. So the first 0-255 counts go to PWM_A output, and the next 0-255 count go towards PWM_B phase. Basic project for PSoC5 is attached.

Figure 1. Project schematic. The Lookup Table commutates PWM output between PWMA and PWMB outputs. 

Figure 2. Lookup Table settings. The in0 - is phase control, in1 - is PWM pulse. The out0- is PWMA, out1- PWMB, out2- reference.  The reference always produces 50% duty cycle output. PWMA and PWMB pulse length equals to the PWM compare.

 

Figure 3. Scope screenshot for PWM duty cycle 100. Blue- PWMA output, Magenta- PWMB output, Cyan - reference. PWMA and PWMB pulses are symmetrical and non-overlapping.

Figure 4. Scope screenshot for PWM duty cycle 180. Blue- PWMA output, Magenta- PWMB output, Cyan - reference.

Figure 5. Scope screenshot for PWM duty cycle 255. Blue- PWMA output, Magenta- PWMB output, Cyan - reference.

[BiBi_1928986]

Hello.

FYI...,
Left/right/centered aligned, are all referenced to the TC signal.  This does not permit freely placing a pulse anywhere along the period duration.

And, with 2 TCPWM's, you need to synchronize them, otherwise the end result will move around instead of remaining centered.

As odissey1 mentioned, there are many ways to achieve what you're looking for.  Here are 2 more examples.

In the first schematic, it uses 2 TCPWM components.  By using the Reload input, they are synchronized and the pulses will appear as in your scope picture, centered.  I used very slow signals with LED's just to see the output.  Feel free to change the clock frequencies and TCPWM config parameters.

In the second schematic, I've mux'd the output of a single TCPWM.  In order to eliminate any spiking at the port pins when the Toggle f-f flips, I've used down counting, right aligned.

These examples should get you started.

Good luck with your project.

[Len_CONSULTRON]

@Wiwaldi 

Thanks for the update.   I understand better now.

What PSoC4 part are you targeting? 

Not all PSoC4s have the same resources.

So from the previous post, I am to assume the PWM1 is 180 degrees out of phase from PW2.  Correct?

The duty cycle is changeable from 0 to 30%.  Is the duty cycle of PWM1 and PWM2 always identical?

What is the target r maximum PWM frequency to support?

[Len_CONSULTRON]

@Wiwaldi 

Is there a reason you are changing the Period?   Changing the Period causes the PWM frequency to increase or decrease.

It sounds like the goal is to keep the  PWM frequency at 35KHz and change the duty cycle from 2% to 30%.

[Wiwaldi]

@odissey1  and @BiBi_1928986  Thank you for the suggestions. I'm evaluating it to see if I can get what I'm looking for.

@Len_CONSULTRON 

I have CY8C4245 AXI-483

"..So from the previous post, I am to assume the PWM1 is 180 degrees out of phase from PW2."

That is correct.

".. Is the duty cycle of PWM1 and PWM2 always identical?"

PWM1 and PWM2 are identical

"... What is the target r maximum PWM frequency to support?.. "

Frequency range is from min 30 to max 40 kHz. All this should run stable at a frequency of 35kHz.

I need to be able to change duty in real time using software.

Step 0.5-1 %.

That's all

[odissey1]

>Frequency range is from min 30 kHz to max 40 kHz.

-Thay was the key! High frequency operation.  In order to achieve frequency tuning in this range, the clock update can't be used due to the course granularity of the clock divider (1,2,3,4..).

So the option left is  to set the clock to e.g. 48MHz and to vary the PWM period between 800 (output frequency 30kHz) and 600 (output frequency 40kHz):

Clock_1= PWM_period x2 x F_out

The challenge will be to update PWM period and compare smoothly and synchronously enough to avoid any glitches at the output.

Q. Is PSoC4 going to perform any other operations beside driving the PWM? (ADC, UART, SPI etc.)

[Len_CONSULTRON · Accepted solution]

@Wiwaldi ,

I've attached a very simple example project that uses only 1 TCPWM and a simple LUT to generate a two PWM output with identical duty cycle @ 35KHz with the second PWM output centered.

The project starts with a 0.5% DC and increments it every 100ms up to 99.5% DC.

The TCPWM is set up to output a PWM output at 2 times the 35KHz.   Every cycle of the TCPWM generates a OV output that switches which of the two PWM outputs (PWMA or PWMB) to output through the LUT.

Give it a try.

[Wiwaldi]

@odissey1 . Yes. PSoC4 has to perform other operations. I don't have enough resources.

Your suggestion might work, but... resources ... 😒

[Wiwaldi]

So I have only four 16-bit timer/counter pulse-width modulator (TCPWM) and one UDBs available. 🤔

[odissey1]

Though Len has already posted a project above, below is mine version. It includes ADC, UART, but doesn't spare UDBs, utilizing only Fixed Function resources. I tested project using a rotary encoder to easy update parameters, but the uploaded version does not include rotary encoder section, so you need to use UART or something else.

Project is tested using CY8CKIT-042 Pioneer Board, and seems to perform fine in 30-40kHz range. Output frequency tuning accuracy approx. 100Hz. PWM duty cycle accuracy is about 0.25%.

Figure 1. Project schematic. The Lookup Table commutates PWM output between PWMA and PWMB outputs.

Figure 2. Project annotation using KIT-042 Annotation Library. The optional rotary encoder was used to quickly update PWM parameters.

Figure 3. Scope screenshot for PWM duty cycle 100, period 350. Cyan- PWMA output, Fuchsia- PWMB output, Blue - 50% reference. PWMA and PWMB pulses are symmetrical and non-overlapping.

Figure 4. Scope screenshot for PWM duty cycle 350, period 350. Cyan- PWMA output, Fuchsia- PWMB output, Blue - 50% reference. There is 1 clock of dead time between PWMA and PWMB signals.

[Wiwaldi]

@odissey1 your solution works too, but I can't mark that as a solution anymore - button is gone.

[Wiwaldi]

@Len_CONSULTRON  and @odissey1 

thank you for yours excellent support.

It works! With 87.5% UDBs usage 😉

Just as info for you from my experience in this project. Compilation is no longer possible if UDBs are used 100% (not 1% more!). See image.

 

In my opinion it should (100%) just be red, right...?

[odissey1]

It is likely that in the original project you run out of the routing resources (p-terms) also. Usually, problems start to arise when p-terms are used for more than 80%. 

PSoC4 is a little brother of the PSoC5, implementing most functions as Fixed Functions (not UDB). This makes it sort of a one-trick pony, but that is usually sufficient for practical applications. In PSoC4 project UART and PWM should preferably be utilized in FF blocks to optimize hardware usage   

[Wiwaldi]

@odissey1 Understood, thank you very much