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Hi,
We are using PSoC LP 5. Some pins are working differently from others and it confused me.
One pin, pin18 (P5-2, GPIO) drive mode is set to resistive pull up, initial value high, and it stays high; while another pin 29(P12-6, SIO) has the same drive mode and initial value, but it stays low. There is nothing different from both HW and SW perspective in our design. What is the internal difference between these two pins?
Regards,
Winston
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PSOC5 LP MCU
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The <name>.dwr file is the listing of all pins in the Creator view, it does not generate a readable file.
If you want a text listing, go to BUILD - Generate Project Datasheet.
This will build a pdf of all of the settings, example from one of my projects
Thanks always to the PSoC software team to steering me to this.
---- Dennis Seguine
PSoC Apps Engineer
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Which specific part number and package?
---- Dennis
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Part number is CY8C5467AXI-LP108.
Regards,
Yan
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yaga,
From my experience, when pin is always High, even on startup, it means that it has been shorted, and "died". Most likely it was connected to the ground while operating in StrongMode, or to a large capacitor, while providing high frequency output.
Shit happens. Try to use other pins
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We do not have other choice.
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Hello.
Is it possible the SIO pin has been configured to use the "regulated output mode". This mode does not support resistive pull-up or pull-down. This is listed in datasheet just below the table showing the drive modes in Section 6.4.1 and explained more fully in the 5LP architecture document Section 19.3.10.1.
I tested P12.6 on KIT-059 as a GPIO (Kitprog snapped off) and it behaves as configured.
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Wired thing is that sometime, or for some builds, it works just fine.
Regards,
Yan
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Hmmmm...
What is P12.6 connected to?
What voltages are powering the 5LP?
Since it works sometimes, there is likely a hardware design error. Maybe you can go through the document, AN61290. It's a h/w design checklist for 5LP.
Or, maybe a simple solder short between adjacent pins.
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Thanks for all for your replies.
It turned out that the pin assignment changes hiddenly. I assigned the pin to the pin I want, somehow the pin is not locked and it changed to another pin. So the pin I measured is not actually the pin in my design view/SW. It is my bad. But it does remind me the following question: Why does the pin assignment change?
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yaga,
PSoC Creator normally doesn't lock the pin down if you let it auto-assign GPIO pins.
If the pin isn't locked, then the next time you go through the "Application Build" phase, it may reassign it.
There are three ways to lock down the pin assignment. On the DWR/Pins window in the pin you want to lock:
- Check the box in the "Lock" Column.
- Select the pin number in the "Pin" Column.
- Select the port [bit] in the "Port" Column.
Selecting 2 or 3 will automatically lock the pin.
"Engineering is an Art. The Art of Compromise."
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Hi,
Do you know in which file the pin assignment and locking state are stored? We need to checkin the files into our git repo so it is saved.
Regards,
Yan
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yaga,
I'm confident that the file is the <project_name>.cydwr file. The cydwr = Cypress DWR.
"Engineering is an Art. The Art of Compromise."
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The <name>.dwr file is the listing of all pins in the Creator view, it does not generate a readable file.
If you want a text listing, go to BUILD - Generate Project Datasheet.
This will build a pdf of all of the settings, example from one of my projects
Thanks always to the PSoC software team to steering me to this.
---- Dennis Seguine
PSoC Apps Engineer