PWM Smoothing

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WolfgangCS
Level 3
Level 3
25 replies posted 50 sign-ins First solution authored

 

Hello,

I have a PSoC3-based project to control two motors via PWM.
Currently the PWM block on PSoC Creator is set to work with an input clock of 2MHz, and dividing the period into 100 samples gives a resulting period of 50us and therefore 20kHz.

WolfgangCS_0-1667986534063.png

WolfgangCS_0-1667992037886.png

 

When I send a command to the motors (which use 24V) they get a step (from 0V to 24V) which activates them abruptly.

Is there a way to implement this via software on PSoC Creator or via firmware to not have the step but something smoother such as a ramp?

Thanks

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18 Replies
BiBi_1928986
Level 7
Level 7
First comment on blog 500 replies posted 250 replies posted

Hello.

Have a look at this project by LEN where an LED ramps from OFF to full brightness.
Solved: Psoc 5LP change the brightness of LED - Infineon Developer Community

Basically, you want to do the same ramp function to turn the motor ON from zero to full speed.  You could also implement the reverse when stopping the motor.

Since you're dealing with a mechanical device, it will have inertia that might not change in a linear fashion.  You might need to have a PWM lookup table to make the speed changes more linear (if you want them linear).

If you want to do this in s/w instead, Motoo also provded a ramped LED example. 
Solved: I'm trying to fade a LED, without using PWM? only ... - Infineon Developer Community
Just flip around the technique for ramp up speed.

Search github for more examples.  And the Cypress Examples in Creator.

Good luck with your project.

Hello,
Thank you for the answer.

The examples given are very interesting. Actually in my case the pwm value used for the motors is first calculated using certain values from a PID controller, so following the examples given I thought that once this pwm value has been calculated, do as in the examples by incrementing a variable up to the calculated pwm value and use this variable to indicate the value to be sent to the motors.

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Hello.

It sounds like you are on the right path with your design method.  But for some reason, not getting the results you'd expect.

To debug this, you could print some of the PWM values that are being sent to PWM component during the ramp up state.  You don't need to connect a motor to see these values.  This should tell you if the PID equations are working.

The other thing about motors, which you may already know, is their starting current can be quite high to get the motor rotating from a stopped state.  I don't know if your PID equations take this into account.  For example, you might need to have 75% duty cycle to get the motor to rotate, and then drop back to 10% duty cycle to start the ramp state.

You could also search github for examples.

SampathS_11
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250 sign-ins 250 solutions authored 5 questions asked

Hello Wolfgang,

I understand that the motor controllers you are using, take an analog input, 0.00V to 24.0V, and set the motor speed proportionally. 0.00V for 0 speed, 12.0V for 50% and 24.0V for 100% speed. Kindly let me know if my understanding is correct.

Best regards,

Sampath

Hello,
Yes, the basic operation is basically this described by you, even though the pwm value is calculated via a PID controller.
However, when I send a command to the motor it steps directly from 0.00V to 24.0V, causing unwanted voltage and current peaks, so I was looking for a way to make this step smoother.

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SampathS_11
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Hello @WolfgangCS ,

I think we will need a low-pass filter for the digital pwm signal, followed by a voltage amplifier, as shown in the picture below.PWM to analogPWM to analog

@SampathS_11 Thank you very much for your reply and the schematic.
I would just like to ask a few questions about it:

  • Isn't a passive RC low-pass filter sufficient?
  • Should this filter be inserted between the output of the motor driver and the motor, or between the PSoC and the driver?
  • Could you possibly tell me the values of the components (resistors and capacitors)? The PWM frequency I use is 20kHz.

I would have preferred to implement this on the PSoC3 firmware because I don't have much space on the PCB at the moment. I would still try to implement such a solution if possible.


Thank you very much

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Hello @WolfgangCS ,

Q) Isn't a passive RC low-pass filter sufficient?

A) The output of the RC low-pass filter should be between 0.00V to 3.30V, assuming PSoC VDDDIO is set at 3.30V. Since your motor driver requires 24.0V, we need an amplifier.

Q)Should this filter be inserted between the output of the motor driver and the motor, or between the PSoC and the driver?

A) This schematic has to be inserted between the PSoC and the motor driver. PSoC3 has amplifiers, but they work at 5.0V or less, and not up to 24.0V.

I will answer your last question tomorrow. Meanwhile, do kindly let me know VDDIO of PSoC3 which drives the PWM output.

Best regards,

Sampath Selvaraj

Hello @WolfgangCS ,

I have a gut feeling that the control input of our motor driver may be only 0.0V to 5.0V. Can you kindly confirm? If it is this range, we should have some possibilities to use PSoC3 analog peripherals through firmware.

Best regards,

Sampath Selvaraj

Thank you for your answers.

The motor is not directly connected to the PSoC3.  In summary, my system works like this:
I use a PSoC3 CY8C3246PVI-147. The pins I use to control the motor are pin 25 P1[0] and pin 26 P1[1].
These outputs from the PSoC first go into an Optocoupler ACSL-6400-00TE (I need this type of isolation for other reasons), and then they go to the MC33887PFK motor driver (also why I asked earlier where it would go.

For the second question, I think that the control input of motor driver is from 0.0V to 5.0V, also because from the datasheet of the MC33887 the input voltage of the control inputs is -0.3V to 7.0V.

Thanks.

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Hello, and thanks for the new details of your circuit.  Lots of questions to ask.

What is your feedback signal for PID calculations?
I don't see any feedback signal in your descriptions.

What is resistor value driving Opto LED?

What is resistor value acting as pull-up on Opto output?

What voltage rail is Opto output pull-up resistor going to?

Chip PWM spec is 10kHz.  Why is 20kHz used?
20kHz can only be used with motor current feedback limiting, otherwise internal charge pump doesn't perform well.

I'd still suggest to print the PID PWM values to see what's going on.  You could be in for a surprise.

I'd also suggest some test code to software toggle the GPIO's going to the motor control.  Using CyDelayUs(), toggle the GPIO's for 25% duty cycle and after 2 seconds, 50% duty cycle for another second and then 0% to stop motor.  This will establish if hardware interfacing is reasonably correct.  Once this is working, then go back and add PWM component control.

Hello,

1. What is your feedback signal for PID calculations?
I apologise for not mentioning them before, but magnetic encoders are used to reconstruct the motor position by reading the rotation. For the PID calculation I use this feedback.

2. What is resistor value driving Opto LED?
The resistor is 1k Ohm.

3. What is resistor value acting as pull-up on Opto output?
The resistor is 10k Ohm.

4. What voltage rail is Opto output pull-up resistor going to?
This voltage is 5V.

5. Chip PWM spec is 10kHz.  Why is 20kHz used?
I use a current limiting implemented in the firmware of the PSoC3. 

I will try the tests you recommended using CyDelayUs(), thanks!

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Hello.

Thanks for the information.

It sounds like you've done your homework.  It's now a question of software control of the hardware that appears to be mis-behaving.

Other people contributing their expertise have provided excellent design details which should be considered as part of trouble-shooting.  For now though, the issue is, why does the motor go from zero to full speed when commanded to ramp up slowly towards full speed?

You mention using the current limiting feature.  Is this an analog signal being fed into PSoC3 for processing?  Or do you condition the signal by first converting the current into a voltage, send it to a comparator versus a reference voltage, go thru an opto-isolator, into PSoC3 GPIO pin?  I'm just thinking that, since you've provided isolation for the motor control signals, all signals should be isolated.

I'm hoping your 5V rail for opto pull-up resistor is a separate supply from PSoC 5V rail.  Yes?

I'd make the opto pull-up resistor smaller, example 2k Ohm.  The datasheet shows 330 Ohm to 4k Ohm.  The controller chip needs to see 3.5V or higher for a logic 1.

The LED current in opto needs 8mA minimum for long term reliability.  I haven't read the PSoC3 spec's, so you'll have to verify if you can get this much current from a PSoC pin.  You can also parallel PSoC pins together to get more current.

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Wolfgang,

Thank you for the info about the NXP MC33887.   This H-Bridge IC uses a voltage higher than VDDD of the PSoC (5V).   In your previous post you cited 24V.

It sounds like you are trying to avoid the initial 0V to 24V spiking which is actually caused by the MC33887.  However to achieve this there are 4 suggestions I can make:

1 Analog Filtering on the motor outputs

It's possible along with the PWM ramp up to use a capacitor to GND (VSS) on each motor output (OUT1 and OUT2).  This would help to smooth out the 0V to 24V rise and fall times to the motors.  Although a larger cap does more smoothing, too large causes excessive initial current draw from the FETs (a discharged cap looks like a short).  

In my past employment as an automotive supplier, the customer required no more than 10nF for this cap.  One of the reasons is that a larger value cap could cause more EMI to be emitted.

2 At ramp-up ONLY, PWM at a frequency higher than the MC33887 operating frequency

IF the MC33887 allows you, PWM at frequencies that are higher than the recommended maximum (20KHz), then you can use the higher PWM frequencies (let's say 30KHz) during the ramp-up to force the FETs to be driven in the analog range.  This makes the digital input look like a progressively ramping sawtooth at the motor outputs.

Once the ramp-up is completed, make sure you PWM at something below the maximum PWM frequency.  

The downside with this method is that the FETs (HS and LS) in analog range mode have partial  conductance for both FETs simultaneously.  This causes some shoot-through current causing the MC33887 to heat up much faster.  So make sure the heat tab is properly soldered to good copper to spread the heat.

3 Control the Motor supply Voltage to the MC33887

If you use a variable motor supply voltage with the motor OFF, you can start the MC33887 V+ supply at 5V (specified minimum).

During the ramp-up time, you can progressively ramp-up the supply voltage to the MC33887 until the desired 24V is achieved.

Downsides:

  • More expensive design due to needing a variable supply capable of supplying 5A of current (probably a SMPS)
  • You need at least one extra pin from the PSoC to provide the control signal for the motor supply voltage.

4 More careful PCB layout or larger wire diameter from the main power source.

I'm suspecting that the major issue you are having is that when the motors first turn on, your VDDD to the PSoC drops enough to cause issues.  Such issues is either a low-voltage detection interrupt or a forced power reset (or both).

In what you have revealed, it appears your PSoC is operating on 5V for VDDD and your motor circuit is on 24V for V+.    I'm guessing that the PSoC VDDD is derived off the V+ through a LDO analog regulator.  Make sure your high frequency bypass caps and bulk capacitance on the 5V to VDDD are sufficient. 

Also, you may need a larger input bypass cap to the LDO Vreg.  This will be necessary to isolate most V+ drops to the 5V LDO Vreg.

If PSoC forced resets are occurring try this experiment:

  • Disable the LDO Vreg to the PSoC.
  • Supply 5V from a separate power supply to the PSoC.  This forces a power isolation from the V+ (24V) supply.

If all goes well in this configuration, you need to find the cause of the power supply isolation issues I mentioned above. 

If this does not solve the problem, then something else is going on.

I mentioned to take a look at the PCB layout.  Sometimes, designers put insufficient trace widths on the power proving the 5A+ to the entire system.  A thinner width can cause significant voltage drops especially when larger currents are required.

I also mentioned about checking the wire diameter from the power source.  A smaller wire diameter can have the same effect as mentioned above about the thinner PCB trace width.

The advantage of this suggestion that if this is the answer then in production this represents the cheapest solution.

I've been a HW designer in automotive industry for a couple of decades.   I've routinely worked with 12V (or higher) voltage supplies to motors and use 5V (or lower) LDO Vregs to the control CPUS.   With careful layout and Vreg manufacturer bypass cap recommendations, I avoided unwanted CPU resets.  Also my current requirements to the module determine the power supply wire diameter being used.

I hope one of these suggestions helps.

Len
"Engineering is an Art. The Art of Compromise."
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DennisS_46
Employee
Employee
100 sign-ins 50 likes received 50 solutions authored

Wolfgang:
Where are the spikes? How big?
Please provide a schematic of:
   PSoC connection to the MC33887
   MC33887 to the loads.
   Power supply connections to MC33887 and to PSoC.
Please provide scope shots of PSoC outputs, power supplies, MC33887 output.
        Scope shots should all be synced to PSoC output.
We don't to see the whole system schematic, don't worry about your other propriety stuff.
---- Dennis Seguine, Infineon senior PSoC applications engineer. 

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SampathS_11
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Hello @WolfgangCS ,

MC33887 has two control inputs IN1 and IN2. I presume that you are providing PWM to one of the inputs (I will assume it is IN1), and the other input (I will assume it is IN2) is tied to logic low. In this case, the voltage at OUT1 will swing from 0.0V to 24.0V and back and will look similar to the PWM output of PSoC3. But the speed of the DC motor will depend on the duty ratio. You can check the waveform using an oscilloscope. The current flows from the top left transistor, the motor coil and the bottom right transistor, assuming that IN1 is connected to the left vertical arm, and IN2 to the right vertical arm (referencing Figure 2 in the datasheet).

If you connect a capacitor of an optimum value across the terminals of the DC motor, you will be able to see the average voltage, with small ripples which will be in sync with the edges of the PWM on time. For starters you can connect a 100nF capacitor. Increasing the value of the capacitor will give you less ripple but may violate the maximum current specifications of OUT1/2.

(If IN2 is tied to logic high, then the motor direction will be opposite, and the speed will be inversely proportional to the PWM duty cycle. The current will flow through the top right transistor, the motor coil and the bottom left transistor.)

Do kindly give us any oscilloscope screen shots, relevent portions of the schematics, and any other information.

Best regards,

Sampath Selvaraj

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PSa_795526
Level 4
Level 4
First question asked 10 sign-ins First like given

Hi,

If this issue is still of interest - 

One of the concerns may also be that the motor driver response seems to be slower than PSoC3 and the optocoupler.. The MC33887 datasheet indicates Output ON/OFF delays upto 18 uS, while the optocoupler has sub-uS response. Within a 50 uS PWM window from PSoC3, a considerable part may be taken by the rising and falling edges of the motor driver output.
If so, and acceptable in your application, then you may check if a slower PWM wave from PSoC3 - say 500 uS instead of 50 uS, helps in a more linear mechanical speed response of the motor to the entered PWM duty cycle in PSoC3.

Thanks and Regards,
Prem Sai

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odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

WolfgangCS,

If it is still matter, the output to PWM should be slew-rate limited to avoid sharp changes. While drafting a code for you, I found excellent article describing this solution with code library provided

https://www.dsp-weimich.com/digital-signal-processing/digital-slew-rate-limiter-filter-and-c-realiza...

 

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