PSoC5LP problems when wokeup from hybernate state

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MaTr_1730276
Level 4
Level 4
First like given 10 sign-ins First solution authored

Hi all,

I have a problem with using CyPmHibernate() function.

My extracted code is:

 

CyPmSaveClocks(); 
CyPmHibernate(); 

CyPmRestoreClocks();

 

All works well during Hybernate state, but when my system is wake up, I noted that my firmware reset and start from the beginning.

I think the problem is due to "CyPmRestoreClocks()" function because if I comment it, the reset not occurred.

Following is my CLOCK setup:

MaTr_1730276_0-1658756306729.png

Did sameone experienced the same problem and know how to workaround?

Regards

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4 Replies
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

To PSoC5LP hibernate experts,

Is there a minimum wait time after a hibernate wakeup before enabling. higher power devices such as the faster clocks?

In hibernate mode, the CPU Vreg is shutdown to save power.  How long does it takes to activate the Vreg and make sure it has even power to supply higher power devices?

MaTr,

Here's my thought:  In hibernate mode, virtually all other internal Vregs supplying lower operational voltages are shutdown.  The Hibernate Voltage regulator might be the only regulator operating.  This means that all the bypass caps for the other regulators are discharged.  In the case of the CPU regulator, the bypass cap on VCCD is discharged.

Therefore when the ARM exits hibernate, the CPU regulator is turned on but it takes some time for the voltage on VCC to charge up.  The higher the value of this cap, the longer it takes.

When you enabled the higher speed system Clocks immediately after exiting hibernation, this might have caused too much current draw on the regulator supplying this clock and therefore cause an LVD or POR event.  The LVD or POR event subsequently caused a reset.

By disabling the CyPmRestoreClocks, this avoided the reset.

Suggestion:  Reenable the CyPmRestoreClocks() but place a CyDelay() of a few milliseconds before it.

 

Len
"Engineering is an Art. The Art of Compromise."
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MaTr_1730276
Level 4
Level 4
First like given 10 sign-ins First solution authored

I've just tried to insert a few ms delay but the problem has been not solved.

 

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MaTr_1730276
Level 4
Level 4
First like given 10 sign-ins First solution authored

I tried with WDT to do not start it at Power On and now the MCU do not reset after WakeUp.

However, do not work well after WakeUp, seems that the clocks are not as before to hybernate.

I think that for that reason, when WDT was active, make a reset due to clock without specification.

Have anyone any ideas which is the problem?

 

Regards,

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@MaTr_1730276 wrote:

I tried with WDT to do not start it at Power On and now the MCU do not reset after WakeUp.

However, do not work well after WakeUp, seems that the clocks are not as before to hybernate.

I think that for that reason, when WDT was active, make a reset due to clock without specification. camzap

Have anyone any ideas which is the problem?

 

Regards,


When you enabled the framework ticks at a higher rate after exiting sleep mode, this may have caused excessive power consumption on the controller providing this clock, thus causing an LVD or POR event. The LVD or POR event therefore caused a reset.

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