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PSoC™ 5, 3 & 1

MaMi_1205306
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Level 6

Dear Sirs and Madams,

Is it possible to confirm for the status of the "wakeup_out" signal described on Figure 19-11 PICU Block Diagram of page 158 in PSoC5LP Architecture TRM?

I checked the PSoC5LP register TRM, but could not find the register description related to "wakeup_out".

pastedImage_0.png

Regards,

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AikoO_51
Moderator
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Moderator

There is nothing such as register to keep a value of wakeup_out, as Len mentioned.

Also it wouldn’t be suitable to recognize by a value of pin whether interrupt is working correctly.

So I leave a suggestion here to avoid wake-up automatically from Hibernate mode.

Please try to configure GPIO pin to Resistive pull-up or pull down, depending on your requirement.

For more details, refer to “Component List” section in 001-56137

component list.png

Aiko Ohtaka
Infineon Technologies

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Len_CONSULTRON
Level 9
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Level 9

MaMi,

I assume you pose the question is because you are not getting a wakeup to the PSoC from a change in GPIO input.

Note:  The more aggressive the  low-power you have chose, the less interrupt sources are available for the wakeup.  Which low-power mode type are you attempting to use?

Len

Len
"Engineering is an Art. The Art of Compromise."
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MaMi_1205306
Level 6
50 solutions authored 25 likes received 250 sign-ins
Level 6

Len-san,

Hibernate mode is used as low power mode.

Rather than not wake up from hibernate mode,

PSoC5LP is a problem that shifts to active mode instead of staying in hibernate mode.

Therefore, We would like to  check the signal of this "wakeup_out".

Regards,

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Len_CONSULTRON
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MaMi,

If I understood you correctly, the problem is not waking up.  The problem is waking up unexpectedly.

You were correct.  The Register TRM does not list a status bit for the wakeup_out signal shown in the PICU diagram.

If you are waking up unexpectedly, is it possible that one of your wakeup sources is set to Digital HiZ?

High impedance inputs have known to have floating signals.  This means that stray voltages can cause the input to cross the logic switching threshold.

Len

Len
"Engineering is an Art. The Art of Compromise."
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AikoO_51
Moderator
Moderator 50 solutions authored 100 replies posted 50 replies posted
Moderator

There is nothing such as register to keep a value of wakeup_out, as Len mentioned.

Also it wouldn’t be suitable to recognize by a value of pin whether interrupt is working correctly.

So I leave a suggestion here to avoid wake-up automatically from Hibernate mode.

Please try to configure GPIO pin to Resistive pull-up or pull down, depending on your requirement.

For more details, refer to “Component List” section in 001-56137

component list.png

Aiko Ohtaka
Infineon Technologies
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MaMi_1205306
Level 6
50 solutions authored 25 likes received 250 sign-ins
Level 6

Len-san,

Aiko-san,

We think the PICU and clock are having an effect,

However we have not yet determined what caused the hibernation mode to exit.

I will consider it based on the information you received.

Thank you,

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MaMi_1205306
Level 6
50 solutions authored 25 likes received 250 sign-ins
Level 6

Len-san,

Aiko-san,

I checked it with a simple circuit using CY8CKIT-050.

pastedImage_0.png

When you press the switch assigned to P6_1, Pin_irq goes 'H'.

The VCCA / VCCD waveform at that time was acquired.

pastedImage_1.png

Tte irq pin of the Pin component corresponds to PIRQ,

When PIRQ goes' H', wakeup_out goes also 'H'.

I understand that the timing has moved from hibernate to active mode.

By adding more WDT APIs:

CyWdtStart(CYWDT_1024_TICKS,CYWDT_LPMODE_DISABLED);

CyWdtClear();

If you leave it after pressing P6_1, it can be judged that it is in the active state because it will be reset by the watch dock.

Thank you,

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Len_CONSULTRON
Level 9
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Level 9

MaMi,

I found that when Cypress says a digital input is high impedance they're not joking.

I'm working on a project with multiple inputs.  I left the inputs to digital HiZ.

All was working well until I left one input accidentally unconnected to the drive source.

What happened is the the neighboring pins which were toggling made the unconnected pin toggle giving 'false' input signals.  Luckily I noticed that the results for the unconnected pin was not right.   Further investigation found that the pin was floating (as expected with no drive source and no bias).  The neighboring pins on a floating input of about VDD/2 was inducing their signal onto the pin and toggling the input when it should have been 'quiet'.

I assigned all the inputs as digital input with pull-downs and the problem never reappeared.

Is it possible that your input to exit Hibernate mode is digital HiZ?   If so, try placing a pull-down or pull-up (application dependent) to see if it makes the problem go away.

Len

Len
"Engineering is an Art. The Art of Compromise."
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