PSoC setting of unused GPIO

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MiNe_85951
Level 7
Level 7
Distributor - TED (Japan)
50 likes received 500 replies posted 50 solutions authored

Hi,

I would like to confirm about the treatment of unused GPIO.

It is described in AN 80994 as follows.

AN80994

http://www.cypress.com/documentation/application-notes/an80994-design-considerations-electrical-fast...

"Terminate the unused I/O lines to ground or supply through resistors of typical value of 10 k."

We understand that it implements resistors on the unused pins of analog Hi-Z.

Instead of implementing external resistors, Is it effective to pull up/pull donw unused pins in PSoC internal NVL setting?

Regards,

Masashi

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1 Solution

"The internal pull up / pull down of PSoC can not obtain the effect of EFT"

The understanding is OK.

View solution in original post

3 Replies
LinglingG_46
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 10 questions asked

Hi Masashi,

The linker file you give is the EFT Design Consideration Guide line.

It is sure that the used GPIO is configured in  analog high Z drive mode.

I think you don't use the pull up /pull down resistor unused pin instead on external resistor.

If you use the internal resistor, then it is not in the Analog High Z drive mode.

Thanks

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MiNe_85951
Level 7
Level 7
Distributor - TED (Japan)
50 likes received 500 replies posted 50 solutions authored

Thanks,

It was an idea to reduce the number of external resistors.

"The internal pull up / pull down of PSoC can not obtain the effect of EFT"

Is it OK with the above understanding?

Regards,

0 Likes

"The internal pull up / pull down of PSoC can not obtain the effect of EFT"

The understanding is OK.