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Hello! I am working with the PSoC5LP board, particularly analyzing the configuration of the SC / CT blocks. On page 487 of the 'PSoC5LP_Registers_TRM' I observe that the configuration of the SC_REDC register varies depending on the mode and that it is recommended to see the documentation 'Switched Cap'. Since I have not been able to find this documentation, I am contacted to request it.
Thanks in advance!
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Hello,
Please refer P.293/294 of PSoC5LP Architecture TRM.
It describes the mode of the SC block and provides the recommended settings.
Regards,
Shima
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Hello,
Please refer P.293/294 of PSoC5LP Architecture TRM.
It describes the mode of the SC block and provides the recommended settings.
Regards,
Shima