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PSoC™ 5, 3 & 1

jadkh
New Contributor II

Hello Infineon community!

I finally received my CY8CKIT-059 PSOC5LP. I am a total beginner working with it but I'm looking forward to doing my project with it. 

Accelerometer 832M1-0500:  Supply: 3.3V Sensitivity@80Hz(mV/g)  (X-Y-Z): 3.081-2.534-2.7 Bias Voltage(X-Y-Z): 1.636 1.628 1.659

I'm willing to use the SAR ADC with 12-bit resolution to sample the analog output (60KSPS/channel) of the 3 axes of the Accelerometer. Before the input, I have to filter the signal before with -30dB attenuation at half the sampling frequency.

Can I achieve simultaneous sampling for the 3 axes with the S/H? If not I have to have a minimum sampling of 180KSPS and divide it into 3 to achieve 60KSPS. 

Then, I need to transfer the data of the Accelerometer to an ESP32 with SPI then transmit it wirelessly (UDP) (I think this will be another topic) 

So I have multiple beginner questions. (I think I will receive some replies that I need to read the datasheet😅)

1) Can I use a power bank to power the PSOC using 5V USB? What about the Vref of the ADC (VDDA VSSA etc.) can they be powered internally? If my application is to be battery powered, do you advise me to use a battery instead of the USB powering?

2) Which ADC SAR inputs (pins) do you advise me to use? Can I use the kitprog's and work only with it? Or do I have to involve the target? 

3) I have no idea about how can I filter internally the input. Can you give me some insights? 

4) In the screenshot, I need to check if I forgot something, and ask you what should I put as configuration for the ADC if I power the MCU with USB. Vssa to Vdda? 

The SPI connection and filtering are my next steps, just when I'm sure I'm on the right track

I am sorry for the beginner questions but I'm still learning so I rushed to post a thread to receive advice from experienced people in the field. Feel free to reply even if just to tell me go work on your datasheets or other constructive remarks😂

Thank you, People!

Jad
 

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13 Replies
Raj_JC
Moderator
Moderator

Hi @jadkh,

 

I have gone through your query and here are my suggestions:

  1. Yes, you can use the Power Bank to power the PSoC using 5V USB. As long as the supply voltage for the device is in the rated voltage range, it will work fine. (I have tried it on my side for PSoC 4100PS.)
  2. For the ADC refer to section 8 of the PSoC 3 and PSoC 5LP Hardware Design Considerations. There are some pins with bypass capacitor connected (as sar adc bypass cap pin) avoid using those pins.
  3. For the filter implementation refer to the ‘Filter_ADC_VDAC Example Project’ for PSoC 5LP devices.

Please, let us know if further clarification is required.

 

Thanks

Best Regards

Raj Chaudhari

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jadkh
New Contributor II

Thanks for your reply. 

Just by curiosity, why should I avoid bypassed pins? By bypassing it does not provide a higher sampling rate? What are the cons? 

Regards

 

Jad

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Vasanth
Moderator
Moderator

Hi Jad,

The PSoC5LP-059 kit has some pins shared for the bypass capacitor pins of ADC and also available in the pad. You can avoid those pins(p0.4,p0.3,p0.2 and p3.2).

Best Regards,
Vasanth

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jadkh
New Contributor II

So I can use any GPIO pin for the SAR ADC? and which reference ? 

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Len_CONSULTRON
Honored Contributor II

Jad,

The PSoC5 has 2  first-order LPFs.  Here is a link to my thread with my custom component:

A-LPF-Low-Pass-Filter-Component-Finally 

The 2 LPFs can be routed serially to create a second-order filter.

In your Topdesign, the LPF would have to be placed before the S&Hs to be useful.

You can create your own external third-order filter with external components.

Len_CONSULTRON_0-1637328367623.png

Yes, you can use the USB port with a power bank to supply 5V.  In addition, the 832M1-0500 can take 5V for the excitation voltage VDD.  Based on the datasheet, the output appears to be self-regulated.

Recommendations:

Ditch the PGA buffering the Vref

There is not need to send the Vref for the SAR through the PGA.  The PGA could introduce a voltage offset.  You can feed the Vref directly into the '-' input of the SAR.  Or you can select 

Input Range: 0.0 to 2.048V (Single Ended) 0 to Vref*2

Reference: Internal Vref, bypassed.

This will automatically route the Vref to the SAR and using Internal Vref, bypass will use either P0.2 or P0.4 with an external cap to further stabilize the Vref.

Len_CONSULTRON_0-1637329091922.png

Your LUT is not necessarily in sync with the Amux.

Your LUT state is clock with the EOC of the SAR.  However the Amux you chose can only be modified with SW to select the active channel.   I see you have isr_1 to generate an interrupt to switch Amux.  Depending on what else is going on in your SW, there may be delays after EOC activates.   If your conversion rate is very fast, this might be a problem to capture the axis value before the LUT changes to the next axis to S&H.

Suggestion:  You can look at routing the LUT's out0 and out1 to a different version of the Amux.  This type uses the LUT outputs 0 and 1 to sync the Amux switching without SW intervention.

Len_CONSULTRON_1-1637330289975.png

Use of an Input third-order LPF and Sample & Hold may be redundant.

What is your goal for the third-order corner frequency?

Using the +/- 25g version of this part, you can get 1/100th of a g resolution with Vref = 1.024V and SAR resolution = 12 bits.  (ie 500uV per ADC count.  The accel. sensitivity is 50000uV/g).

The spectral noise is only 120ug at 10Hz and less at higher frequencies.

I don't know your target application.  However I suspect you can use a first-order LPF with a corner frequency at about 1000 Hz.  With a quick conversion rate of the SAR, you can use a moving averaging for each axis to create a SW LPF.

 

I don't know if there is a reason to use this specific accelerometer.  There are other very accurate tri-axis sensors with internally handling the sampling and ADC conversion.  They can offer a SPI or I2C interface.  Some of these units can be programmed to internally trigger an interrupt the CPU based on SW programmable threshold  parameters.  This minimizes the CPU workload.

 

Len
"Engineering is an Art. The Art of Compromise."
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jadkh
New Contributor II

 

Input Range: 0.0 to 2.048V (Single Ended) 0 to Vref*2

If the excitation voltage for the sensor is 5V, with this option the maximum ADC input will be 2.048V, right? how to read the whole range: 0-5V ? There is not need to send the Vref for the SAR through the PGA.  The PGA could introduce a voltage offset.  You can feed the Vref directly into the '-' input of the SAR.  Or you can select 

Reference: Internal Vref, bypassed.

They didn't advise me to use internal bypass, so to avoid the  0.2, 0.3, 0.4, 3.2. Do you think why? And can I assign any GPIO to use them as the SAR inputs? do you think I need external bypass caps or can I ommit them.

What is your goal for the third-order corner frequency?

Simply because the norm requires that. 

Using the +/- 25g version of this part, you can get 1/100th of a g resolution with Vref = 1.024V and SAR resolution = 12 bits.  (ie 500uV per ADC count.  The accel. sensitivity is 50000uV/g).

The spectral noise is only 120ug at 10Hz and less at higher frequencies.

I am using the +/-500g, and selected this sensor because my application is a head drop test that can reach the 500g. I searched for accelerometers that are conditioned but I didn't find in those ranges of G's. 

So do you think with the 500g version with frequency response of 6kHz do I need filtering? Or the high sampling can do it?

to use the moving average method, do I need further implementation or a special method? Or the fact that I'm using high sampling, It creates a digital filter? Thanks for your responses and sorry for my beginner questions. 

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Len_CONSULTRON
Honored Contributor II

Jad,


Input Range: 0.0 to 2.048V (Single Ended) 0 to Vref*2

If the excitation voltage for the sensor is 5V, with this option the maximum ADC input will be 2.048V, right? how to read the whole range: 0-5V ? 


You can change the Input Range: to Vssa to Vdda (Single-Ended).

Len_CONSULTRON_0-1637677374822.png

However don't assume that Vdda to be 5V.   It is a good idea you make the AmuxHw_1 to a 4-input with Vref at 1.024V as an additional input.  Measuring Vref which should be a constant voltage, all the other voltages measured (for X, Y Z axises) can be scaled to more correct voltages.   In addition you would have to expand the LUT truth table to include the 4th input.

Len_CONSULTRON_1-1637677853414.png

Using a potentially non-constant voltage such as Vdda can lead to some measurement inaccuracies.   Vdda might have some "bouncing" due to intermittent loading on the voltage source.


There is not need to send the Vref for the SAR through the PGA.  The PGA could introduce a voltage offset.  You can feed the Vref directly into the '-' input of the SAR.  Or you can select 

Reference: Internal Vref, bypassed.

They didn't advise me to use internal bypass, so to avoid the  0.2, 0.3, 0.4, 3.2. Do you think why? And can I assign any GPIO to use them as the SAR inputs?


In your Topdesign you used the SAR in differential mode.  Additionally you had a 1.024V Vref as an input to a PGA (I'm assuming the PGA gain is x2).  This means the output of the PGA is intended to be 2.048V.  Therefore all SAR readings are '0' centered at 2.048V (an input at 2.048V reads as an ADC count of 0). 

There are a few potential issues.

  • ANY PGA has a potential input offset voltage (Vos).  The PGA Vos is rated at  10mV.  This means that with a input Vref of 1.024V that it could be an input of 1.024V to 1.034V.
  • A PGA gain multiplies the Vos.  Therefore if the gain is x2, then the Vos_with_gain = 10mV x 2 = 20mV.  The output could be as high as 2.068V.
  • If the excitation voltage for Vdda = 5.0V then the sensor should be using a excitation/2 voltage of 2.5V.  This means that the axises perpendicular to gravity should be reading 0 gs.  At 0 g, the output for the axis should be 2.5V.  Therefore with the SAR in differential mode and the SAR ref at 2.048V, these axises will have an offset of 2.048V - 2.5V = -0.452V =>  -0.453V/2.048V * (2^12) = -925 ADC counts.  This offset can be compensated in SW.  
    If the sensor pushed an output of the excitation/2 voltage, then you could use that as a reasonable reference to the SAR ref.  However, it doesn't appear that is an option.

The use of a external bypass option for the Vref is to help to reduce potential loading "bouncing" on that signal.  Usually a good policy if available.

What is your goal for the third-order corner frequency?

Simply because the norm requires that. 

Refer to the discussion below.

Using the +/- 25g version of this part, you can get 1/100th of a g resolution with Vref = 1.024V and SAR resolution = 12 bits.  (ie 500uV per ADC count.  The accel. sensitivity is 50000uV/g).

The spectral noise is only 120ug at 10Hz and less at higher frequencies.

I am using the +/-500g, and selected this sensor because my application is a head drop test that can reach the 500g. I searched for accelerometers that are conditioned but I didn't find in those ranges of G's. 

So do you think with the 500g version with frequency response of 6kHz do I need filtering? Or the high sampling can do it?

  1. You are using the least sensitive of the sensors.  This is because you need to measure drop g values.

I'm assuming in your application, you are trying to "accurately" measure the g forces.

Assuming you can achieve accuracy with some acceptable level of tolerance with solving som eof the issues listed above, A +/- 500 g sensor is 1000 g full scale.  With a 12 bit SAR the max ADC count is 4096.  This means that  your 'g' resolution (per 1 ADC count)= 1000g/4096 cnts = 0.24g/cnt.

Performing a HW third-order LPF can be a bit tricky.  This partially due to the accuracy of your external components (resistors and caps).  The lower the corner frequency, the more difficult to get a good result.  

Additionally you would need identical filters for each axis.

Using a SW filter is usually much less expensive.  The cost is the time it takes to calculate the data.

to use the moving average method, do I need further implementation or a special method? Or the fact that I'm using high sampling, It creates a digital filter? Thanks for your responses and sorry for my beginner questions. 

There are at least three styles of averaging for data acquisition filtering:

Simple Averaging

As the name implies this is the simplest method.  This method takes 'n' samples of the same axis and adds the results together then divides the total by 'n'.

The effective corner frequency is about the axis sampling rate / 'n'.

Pro: Simple algorithm.

Con:  'True' transient peak values get reduced to a smaller value due to averaging of multiple smaller samples.  Additionally the data has a time delay dependent on the 'n'/sampling rate.

Windowed Averaging

This method performs a FIFO to the incoming data.  Like the Simple Averaging, it performs an averaging on the last 'n' samples.  When a new sample comes in, it throws out (or ignores) the oldest of 'n' samples.   

The effective corner frequency is closer to the sampling frequency but not too far from sample rate/'n'.

Pro: Peak values in the signal are less attenuated.  The time delay to a signal value is closer to the sampling rate.

Con: Peak values are still attenuated but not as much as the Simple Averaging. 

Differential Averaging

This method can use the "Simple" or "Windowed" approach to buffering the incoming data.

The change in this method is that the data in the buffer is analyzed based on consecutive measurements.  If the reading at x+1 is only slightly different than the previous sample (at x), then the value at x+1 is multiplied by 1 and added to the accumulated sum.  If x+1 is more different than x, then multiply the value at x+1 times 2 and then add to the sum before averaging.

If x+1 is even more different that x, then multiply the value of x+1 by 3 and add to the accumulated sum.  I hope you can see the pattern here.

In this method you determine the 'weighting' value based on the difference between values in time.  What this does is help to filter out noise that may appear which only may appear as 1 or 2 ADC counts in the signal.  'True' signal differences get accentuated and the average value has a better representation of the peak value.

You determine how many ADC counts represent noise in the system.

The effective corner frequency is closer to the sample rate with virtual no 'n' division factor.  This effectively allows for a LPF with a sharper "cliff" rather than a drop-off slope.

Pro: Peaks are significantly less attenuated.   With a good choice of 'weighting' values, you can lower the sampling rate and use less samples ('n') for the data buffer.

Con:  It requires more CPU computing. 
Because the values are use a weighting factor multiplied, the averaging algorithm is slightly different.  The accumulated sum incudes all the values with multiplication.  Then you need another variable that sums all the multiplication factors in the 'n' samples.  The accumulated data values are then divided by the accumulated multiplication factors.

Additional Recommendations

  1. To determine the effective corner frequency, sample the data of 'real' drops and determine the rise or fall time of the maximum signal difference WITHOUT ANY HW or SW FILTERING.  This time is minimum period assuming you could synchronize the signal acquisition.  Since you can't synchronize a asynchronous real-time event,  take this period and divide by 2, 4 or 8.   This oversampling will more accurately result in capturing peak values in a reasonable amount of time.  1/sampling period = sampling rate.
  2. If you can acquire the data listed in the recommendation 1., you have the 'raw' data hopefully sent to a PC.  Using the PC, you can perform better analysis using many tools including MathCAD and others.  In this case you may not need to performing ANY filtering on the incoming data.
Len
"Engineering is an Art. The Art of Compromise."
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jadkh
New Contributor II

Hello again, 

I finally soldered my sensor on a blank PC board and it is ready for testing.

I am getting this error that I didn't manage to solve. 

I attached the drawing with the configuration of the ADC

Drawing psoc creator.PNG

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Len_CONSULTRON
Honored Contributor II

Jad,

Sorry.  I hadn't looked at the AmuxHW datasheet.

The AMuxHW has a requirement by the component author.  Datasheet excerpt:

Input/Output Connections
This section describes the various input and output connections for the AMuxHw. An asterisk (*) in the list of I/Os indicates that the I/O may be hidden on the symbol under the conditions listed in the description of that I/O.
0 - 255 – Analog
The AMuxHw Component is can have between 1 and 256 analog “inputs.” Paired inputs are present when the MuxType parameter is set to Differential. These inputs must be GPIO pins.

☹️

I changed out the AmuxHW to the AmuxSeq.  Sadly, this requires the CPU to switch the AmuxSeq_1 on isr_1.  I was trying to avoid that due to potential CPU latency lags.

Len_CONSULTRON_0-1637686449131.png

 

Len
"Engineering is an Art. The Art of Compromise."
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odissey1
Honored Contributor II

jadkh,

It is hard to get good quality data with 3 S&H circuits and single ADC. My experience with S&H block is not positive. In addition, you have to fight a cross-talk between ADC channels.

Instead, I suggest using all 3 ADCs of PSoC5 (two SAR_ADC and one DelSig-ADC) to simultaneously sample X,Y and Z channels of the accelerometer. The DelSig-ADC has better resolution (16-bit at ~40kHz), and ADC_SAR can be oversampled to achieve effective 14-16 bit resolution using digital filtering.

What "output" rate you need to achieve?

/odissey1

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jadkh
New Contributor II

Hello Odissey,

Thanks for the reply. 

Yes this is what I thought of. 

I need to have a 12bit res and sample at Minimum 20000Hz, with an anti aliasing filter of 30dB attenuation at half of the sampling rate. 

By digital filtering you mean the VDAC with a filter component like this project?

1634139267409.png

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odissey1
Honored Contributor II

jadkh,

The sensor can provide only 6 kHz analog bandwidth, so after all oversampling and filtering there is no need of having more than 6-10kHz output.

The challenge is that PSoC5 has two dissimiliar ADCs: SAR and DelSig, which need to be conditioned to the same bandwidth and resolution.

     The DelSig-ADC should work as-is without any issues. The SAR_ADC can be oversampled at 64xF frequency to get effective 15-bits using either hardware or DigitalFilter Block.

     I will take a look into it.

 

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jadkh
New Contributor II

Noted !! 

The SAR_ADC can't get 12bits effective without filter? All I need is 12 bit resolution

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