Dear all PSoC enthusiasts friends.
I am having a little struggle in developing a system that Integrates a HDL part along with a MCU part. Basically the system will work as a PLC in which all the communication (SPI, GPRS - UART, Zigbee - UART, i2c and DAC) will be handled by the Cortex-M3 of the PSoC 5LP. Therefore the logical part of the design, in which I will be setting and reading digital ports, I want to use the PLD capability of the PSoC architecture.
I have already made a project in which I use several Status Register and Control Register blocks along with my Verilog component and it has worked quite well so far. The struggle is that I only have 24 of each Register block. I tried to find a way of accessing (read or write) registers mapped on RAM via Verilog, but I could not find a way of doing that. Do you have already worked with something like that? How could I pass information between the MCU and the PLD part of the design without using Control and Status Registers?
Thank you very much
Kind Regards
