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PSoC™ 5, 3 & 1 Forum Discussions

abdul_hameed
Level 1
Level 1
First reply posted First question asked Welcome!

Hi I am using PSoc 5 LP for implementing a narrow band stop filter with centre frequency of 1.25Khz and Bandwidth of 0.1Khz. I used DFB for this implementation with modification in ADC_VDAC example with DMA usage.  there are multiple issues appeared for this implementation while trying multiple sampling rate, no. of taps, centre frequency , band and filters type.

1. At the output, the lower frequency range become too much noisy and different from original values.

2. The notch filter response is never achieved with FIR filter

3. The notch filter response with biquad filter different combination is noisy and different from input signal. Kindly suggest any solution for this problem.

moreover, kindly suggest any method for editing values in  using DMA transfer from one block to another. 

Thanks in advance for all your cooperation in this regards.

Abdul Hameed

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1 Solution

It appears that you are using an ADC-Filter-VDAC demo project by Cypress, which has known issues.  So please take a look on the above (corrected) project first:

DelSig_ADC - Filter - VDAC streaming demo using DMA 

It outlines issue which arises when sending signed data from the Filter to VDAC, and gives a solution. Simply modify the Filter setting in the project as you wish (currently it is set to low-pass filter).

 

View solution in original post

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3 Replies
odissey1
Level 9
Level 9
First comment on KBA 1000 replies posted 750 replies posted

I recommend posting your project and scope images of the in/out signals to clarify the issue. 

     Please check similar projects, which can be used as a stub

ADC_SAR - Filter - VDAC streaming demo using DMA 

DelSig_ADC - Filter - VDAC streaming demo using DMA 

/odissey1

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I have used SAR ADC and Del_Sig ADC having 8bit resolution with external ref   with vss-vdda input range and transfering data from ADC to filter via DMA and from filter to VDAC via DMA 1 in different scenario. 

i tried different filters options for 1.25Khz centre frequency and 0.1 band as per attached layout.

do i need to convert 8 bit ADC data into signed 8 bit data for transfer to filter?

regards

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It appears that you are using an ADC-Filter-VDAC demo project by Cypress, which has known issues.  So please take a look on the above (corrected) project first:

DelSig_ADC - Filter - VDAC streaming demo using DMA 

It outlines issue which arises when sending signed data from the Filter to VDAC, and gives a solution. Simply modify the Filter setting in the project as you wish (currently it is set to low-pass filter).

 

0 Likes