Dennis,
Your solution is elegant for VDDA < 4.00V
Will the following be an acceptable solution for VDDA = 5.00V?
Barak,
On a project I executed on a PSoC4, I ran out of ADC inputs and I needed to detect the VDDD/VDDA voltage. I used the Low-Voltage-Detector (LVD) available in the system.
I first made sure the LVD system did not cause a interrupt or HW reset.
Next every 1 second in active mode, I created a SW loop and modified the LVD threshold and read the LVD status register. One I found the LVD threshold that tripped the LVD, this was the VDDA voltage.
This was not as elegant as a ADC read but without extra ADC inputs to the ADC, this was an acceptable substitute.
Yes, with certain limits. There are two separate reference blocks, you can see this on the datasheet analog routing diagram. If you're working on 3.3V, you can route a reference directly to the input of the SAR or the Sequencing SAR.
The reference is Vdd/2, 1.65V. Connect the SAR's reference to 1.024V, this gives a range of 2.048V. This builds nicely.
You can now measure Vdd/2. The limitation is that if you're running at Vdd=5.0V, Vdd/2is over the range of ADC.
If that's the case, it will take an external divider to get the value down to the measurement range of 0 to 2.048V. Be sure to bypass the ref input to the SAR (in my build it was on P0.1) to get a clean measurement.
---- Dennis
Dennis,
Your solution is elegant for VDDA < 4.00V
Will the following be an acceptable solution for VDDA = 5.00V?
Barak,
On a project I executed on a PSoC4, I ran out of ADC inputs and I needed to detect the VDDD/VDDA voltage. I used the Low-Voltage-Detector (LVD) available in the system.
I first made sure the LVD system did not cause a interrupt or HW reset.
Next every 1 second in active mode, I created a SW loop and modified the LVD threshold and read the LVD status register. One I found the LVD threshold that tripped the LVD, this was the VDDA voltage.
This was not as elegant as a ADC read but without extra ADC inputs to the ADC, this was an acceptable substitute.
