Maximum number of DMA transfers

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Anonymous
Not applicable

Hello,

   

I am working on project which takes analog samples from SAR ADC using DMA, put them into the buffer 1 located in RAM, after it finishes filling buffer, it switches to fill buffer 2. While DMA fills buffer 2, buffer 1 is transmitted to pc using CPU via uart. While filling of buffers 2 finishing, the DMA start aggain to fill buffer 1 and buffer 2 is transmitted via uart. The process is cyclic.

   

Each transaction of DMA takes 2 bytes per burst from ADC (ADC operates at resolution of 12 bits) and transfers count is 256 (each DMA transaction takes 128 samples from ADC, while each sample is 2 bytes).

   

After 4096 (total sum) of bytes pass through DMA I start to get wrong data from DMA. 

   

My questions are:

   

How I can  update the transfer counter (I tried to take a look via debugger on PHUB_TDMEM[xxx] - 12 bit of XFRCNT)?

   

How cyclic processes based on DMA must be defined for proper work, solving the limitation of transfer buffer of 4096 bytes?

   

Thank you.

   

Alex

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1 Solution
HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

How do you define "wrong data from DMA"? What you describe seems correct, and there is no limit in the DMA which you should see (apart from each TD limited to 4095 bytes per transfer, but you use only 256). Do you reset each TD after each transfer is done?

   

There are a number of AppNotes about PSoC5 and DMA, did you read them?

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3 Replies
HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

How do you define "wrong data from DMA"? What you describe seems correct, and there is no limit in the DMA which you should see (apart from each TD limited to 4095 bytes per transfer, but you use only 256). Do you reset each TD after each transfer is done?

   

There are a number of AppNotes about PSoC5 and DMA, did you read them?

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Anonymous
Not applicable

Hi Hli,

   

Thank you for your reply. 

   

"apart from each TD limited to 4095 bytes per transfer, but you use only 256" - I see the wrong data after 16 blocks of 256 (16x256=4096), due to this fact I think that I reach transfer count of it max value (4095).

   

The only "TD reset" that I do after each transfer is done it's only disable and enable again of  the DMA channel ( "CyDmaChDisable(DMA_1_Chan);" and "CyDmaChEnable(DMA_1_Chan, 1);").

   

I think that this procedure doesn't restarts transfer counter.

   

What is the correct procedure to reset the TD?

   

P.S. 

   

Yes, I have read all the AppNotes.

   

Thank you.

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

Its about the transferCount set in the TD. It should not matter that you execute the TD multiple times in sequence.

   

When I understand you correct you have two TDs, chained, and each of them is responsible for filling one buffer. This is explained in AN 52705, chapter 10. Whats important is that you set the DMA channel to 'preserve TD', so the TDs get reloaded when they are executed the next time.