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PSoC™ 5, 3 & 1

JuIn_1625121
Valued Contributor II

The customer wants to know Input step characteristic of comparator in PSoC5LP.

The characteristic is the period during that the output voltage changes from 10% to 90% of the maximum output range.

Please tell it.

Best Regards,

Inoue

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1 Solution
TakashiM_61
Moderator
Moderator

This comparator response time in the Table 11-33 were measured by device characterization (i.e. bench test) as Note[59], and they can be only measured at external pin-to-pin.

pastedImage_1.png

pastedImage_2.png

Basically, Comparator response time is measured as follows:

=(Input to Output delay with comparator) - (Input to Output delay with comparator bypassed )

Test Setup:

Vinp is fed with a square waveform with offset of Vref , pk-pk voltage equal to the overdrive condition. Vinm is fixed at Vcm

Vout waveform will be same as Vinp but delayed due to Tresp and its pk-pk is equal to the VDD of the IO domain in which the output pin is powered.

The timing image would be like:

pastedImage_0.png

View solution in original post

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8 Replies
JuIn_1625121
Valued Contributor II

Hi Yoshioka-san.

Please tell additional question.

The customer thinks that the following data may be what he needs.

The data is described on "001-84932_PSoC_5LP_CY8C58LP_Family_Datasheet_Programmable_System-on-Chip_PSoC_Datasheet.pdf".

pastedImage_0.png

I think the parameter and condition are as shown below figure.

pastedImage_1.png

If yes, please tell two pin values.

If no, please give more information about the Specifications.

Best Regards,

Inoue

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Bob_Marlowe
Expert II

The comparator output is digital in nature, thus the step follows hfclk and the rise and fall times of a digital signal.

Bob

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TakashiM_61
Moderator
Moderator

This comparator response time in the Table 11-33 were measured by device characterization (i.e. bench test) as Note[59], and they can be only measured at external pin-to-pin.

pastedImage_1.png

pastedImage_2.png

Basically, Comparator response time is measured as follows:

=(Input to Output delay with comparator) - (Input to Output delay with comparator bypassed )

Test Setup:

Vinp is fed with a square waveform with offset of Vref , pk-pk voltage equal to the overdrive condition. Vinm is fixed at Vcm

Vout waveform will be same as Vinp but delayed due to Tresp and its pk-pk is equal to the VDD of the IO domain in which the output pin is powered.

The timing image would be like:

pastedImage_0.png

View solution in original post

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JuIn_1625121
Valued Contributor II

Hi,

Thank you for your answer.

I understood it.

Best Regards,

Inoue

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TakashiM_61
Moderator
Moderator

Hello Inoue-san,

Do you need any other clarification/support for this thread?

If yes, it would be appreciated if you make it clarified again.

Thank you very much.

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JuIn_1625121
Valued Contributor II

Hello,

Using direct communication to Yoshioka-san,

I have confirmed the information that the customer wants does not exist.

So, I don't need any other information/clarification/support.

Thank you.

Best Regards,

Inoue

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JuIn_1625121
Valued Contributor II

Hi Yoshioka-san,

Thank you for your help.

I can't find description about input step characteristic in the TRM.

Excuse me, please tell where is it.

Best Regards,

Inoue

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