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PSoC™ 5, 3 & 1 Forum Discussions

LeKu_697901
Level 2
Level 2

I'm working with PSOC 3 device through SWD interface using third side hardware.

So I have access to PSOC registers and can use WRITE_REGISTER(<ADDR>,<DATA>) and READ_REGISTER (<ADDR>) commands.

The task is to define I2C pins pair different from default.

How can I do it?

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1 Solution
Rakshith
Moderator
Moderator
Moderator
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Hi LeKu_697901,

I am sorry for the delay in my response. Unfortunately, there is no direct way to get the registers that need to be configured. One thing that can be done is to create a PSoC Creator project for the same functionality and backtrack the registers using the source code that is generated. Would it be okay to use the PSoC Creator project directly to test the I2C functionality?

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B

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Rakshith
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Hi LeKu_697901​,

Can you please provide more details regarding your application?

I'm working with PSOC 3 device through SWD interface using third side hardware.

Are you referring to third party programmers? If so, are you able to successfully program the device?

If you want to use different I2C pins in your application, then you can use a UDB based I2C component. Please refer to the component datasheet for details regarding this - https://www.cypress.com/documentation/component-datasheets/i2c-mastermulti-masterslave

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Hi Rakshith ,

I work with one of universal fast programmers.

The programmer allows an access to internal DUT registers by the commands described above.

Yes I able to program the PSOC 3 device, but before the firmware programming I need to get an access to the PSOC 3 interfaces (I2C, SPI, etc) in order to test peripheral devices connected to these buses.

In the customer's design I2C_SDA = P15.5, I2C_SCL = P15.4

I've used following documents :

1. 001-50581_PSoC_3_Registers_TRM.pdf

2. 001-50235_PSoC_3_Architecture_TRM.pdf

3. 001-62391_CY8C32xxx_CY8C34xxx_CY8C36xxx_CY8C38xxx_CY8CTMA39x_CY8CTMA8xx_CY8CTMA6xx_PSoC_R_3_Device_Programming_Specifications.pdf

4. 001-11729_PSoC_3_CY8C38_Programmable_System-on-Chip_Datasheet.pdf

In the item 2 there is the following table:

pastedImage_0.png

But I didn't find how to do it in any document.

Hope documents you refer include this information.

May be you just can say me which registers with which data should I write?

Anyway thank you for your support.

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Rakshith
Moderator
Moderator
Moderator
1000 replies posted 750 replies posted 500 replies posted

Hi LeKu_697901,

I have forwarded your query to the internal team. Please give us some time to respond back to you.

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Hello Rakshith,

How can I control CPU in debug mode by configuring PSOC3 registers.

Currently CPU in halt mode when I enter to debug mode.

The task is to start CPU for free run and to have an option to read registers after that.

According to the datasheet I see that:

MLOGIC_CPU_SCR_CPU_SCR: 0x46EA and DOC_DBG_CTRL: 0x50220 are controlling the debug mode and CPU state.

I am writing 0xB0  DOC_DBG_CTRL: 0x50220 to run CPU, but reading the same register I get CPU in HALT state (0x02).

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Rakshith
Moderator
Moderator
Moderator
1000 replies posted 750 replies posted 500 replies posted

Hi LeKu_697901,

I am sorry for the delay in my response. Unfortunately, there is no direct way to get the registers that need to be configured. One thing that can be done is to create a PSoC Creator project for the same functionality and backtrack the registers using the source code that is generated. Would it be okay to use the PSoC Creator project directly to test the I2C functionality?

Thanks and Regards,

Rakshith M B

Thanks and Regards,
Rakshith M B
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Hello Rakshith,

Thanks, we already did it. It works.

Best regards.

Leonid.

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