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Hello,
We are using PSoC 5LP and trying to figure the pin state at the beginning of PSoC power on and when PSoC is running stable. My questions are:
- Is the pin initial boot state (when power source connects to PSoC) configured by the Power-On Reset option?
- Is the pin operating termination state (after PSoC is fully bootup and code is running) configured by Initial Drive State option?
Thanks,
Yan
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Hi Yan
On bootup, Whatever ports that you are using in the project are initialized by cyfitter_cfg.c in PSoC Creator and by default other Pins/Ports are in High Impedance mode. Please find more info here: https://www.infineon.com/dgdl/Infineon-PSoC5LP_Architecture_TRM-AdditionalTechnicalInformation-v08_0... in I/O Drive Mode
Thanks & Regards
Arpit Srivastav
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Hi Yan
On bootup, Whatever ports that you are using in the project are initialized by cyfitter_cfg.c in PSoC Creator and by default other Pins/Ports are in High Impedance mode. Please find more info here: https://www.infineon.com/dgdl/Infineon-PSoC5LP_Architecture_TRM-AdditionalTechnicalInformation-v08_0... in I/O Drive Mode
Thanks & Regards
Arpit Srivastav
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Yan,
As Arpit indicated, the GPIO pins at reset are automatically reconfigured to Analog Hi-Impedance. (No pull-up or pull-down biases.) After initialization, your TopDesign and DWR/Pins assignment determines what mode the pins will be.
For most of the GPIO pins it is possible to have specific pins come up in another mode at reset. Is this what you are trying to achieve?
"Engineering is an Art. The Art of Compromise."
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Hi Len,
We are ok for all pin reset state to be Analog Hi-Impedance. A following question: What state would a pin be after power up, if the pin is not configured at all in TopDesign?
Regards,
Yan
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Yan,
As the datasheet, TRM and other GPIO app notes indicate, any GPIO not configured with TopDesign will be left in the default state of Analog Hi-Impedance.
"Engineering is an Art. The Art of Compromise."